A 1 V 186-μW 50-MS/s 10-bit subrange SAR ADC in 130-nm CMOS process

Mingyuan Yu, Ting Li, Jiaqi Yang, Shuangshuang Zhang, Fujiang Lin, Lin He

doi: 10.1088/1674-4926/37/7/075005

key words: SAR ADC, low power, high speed, subrange, modified SAR logic

On the design of high-speed energy-efficient successive-approximation logic for asynchronous SAR ADCs

Jiaqi Yang, Ting Li, Mingyuan Yu, Shuangshuang Zhang, Fujiang Lin, Lin He

doi: 10.1088/1674-4926/38/8/085007

key words: analog-to-digital conversion, successive approximation, low-power, high-speed, internal switching activities