A novel high figure-of-merit SOI SJ LDMOS with ultra-strong charge accumulation effect

Ruichao Tian, Xiaorong Luo, Kun Zhou, Qing Xu, Jie Wei, Bo Zhang, Zhaoji Li

doi: 10.1088/1674-4926/36/3/034007

key words: charge accumulation effect, super junction, breakdown voltage, specific on-resistance

A high voltage SOI pLDMOS with a partial interface equipotential floating buried layer

Lijuan Wu, Wentong Zhang, Bo Zhang, Zhaoji Li

doi: 10.1088/1674-4926/34/7/074009

key words: FBL, SOI, ENDIF, pLDMOS, R_{on, sp}

Analytical model for high-voltage SOI device with composite-k dielectric buried layer

Jie Fan, Bo Zhang, Xiaorong Luo, Zhigang Wang, Zhaoji Li

doi: 10.1088/1674-4926/34/9/094008

key words: composite-k dielectric, accumulated holes, potential well, electric field, SOI

A 800 V dual conduction paths segmented anode LIGBT with low specific on-resistance and small shift voltage

Kun Mao, Ming Qiao, Bo Zhang, Zhaoji Li

doi: 10.1088/1674-4926/35/5/054004

key words: LIGBT, segmented anode, shift voltage, specific on-resistance, 800 V

A novel SOI high-voltage SJ-pLDMOS based on self-adaptive charge balance

Lijuan Wu, Wentong Zhang, Bo Zhang, Zhaoji Li

doi: 10.1088/1674-4926/35/2/024004

key words: self-adaptive charge, self-balance, charge balance, super-junction, substrate-assisted depletion

Concept and design of super junction devices

Bo Zhang, Wentong Zhang, Ming Qiao, Zhenya Zhan, Zhaoji Li

doi: 10.1088/1674-4926/39/2/021001

key words: super junction, silicon limit, power semiconductor device, design theory

A high voltage Bi-CMOS compatible buffer super-junction LDMOS with an N-type buried layer

Wei Wu, Bo Zhang, Jian Fang, Xiaorong Luo, Zhaoji Li

doi: 10.1088/1674-4926/35/1/014009

key words: N-type buried layer, breakdown voltage, electric field modulation, lateral double-diffusion MOSFET, super-junction

Analysis of OFF-state and ON-state performance in a silicon-on-insulator power MOSFET with a low-k dielectric trench

Zhigang Wang, Bo Zhang, Zhaoji Li

doi: 10.1088/1674-4926/34/7/074006

key words: power MOSFET, low-k dielectric trench, reliability, enhanced dielectric field