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Volume 27, Issue 6, Jun 2006
Column
LETTERS
Fabrication of an AlAs/In0.53Ga0.47As/InAs Resonant Tunneling Diode on InP Substrate for High-Speed Circuit Applications
Ma Long, Huang Yinglong, Zhang Yang, Wang Liangchen, Yang Fuhua, Zeng Yiping
Chin. J. Semicond.  2006, 27(6): 959-962
Abstract PDF

A high performance AlAs/In0.53Ga0.47As/InAs resonant tunneling diode (RTD) on InP substrate is fabricated by inductively coupled plasma etching.This RTD has a peak-to-valley current ratio (PVCR) of 7.57 and a peak current density Jp=39.08kA/cm2 under forward bias at room temperature.Under reverse bias,the corresponding values are 7.93 and 34.56kA/cm2.A resistive cutoff frequency of 18.75GHz is obtained with the effect of a parasitic probe pad and wire.The slightly asymmetrical current-voltage characteristics with a nominally symmetrical structure are also discussed.

A high performance AlAs/In0.53Ga0.47As/InAs resonant tunneling diode (RTD) on InP substrate is fabricated by inductively coupled plasma etching.This RTD has a peak-to-valley current ratio (PVCR) of 7.57 and a peak current density Jp=39.08kA/cm2 under forward bias at room temperature.Under reverse bias,the corresponding values are 7.93 and 34.56kA/cm2.A resistive cutoff frequency of 18.75GHz is obtained with the effect of a parasitic probe pad and wire.The slightly asymmetrical current-voltage characteristics with a nominally symmetrical structure are also discussed.
0.25μm Gate-Length AlGaN/GaN Power HEMTs on Sapphire with fT of 77GHz
Zheng Yingkui, Liu Guoguo, He Zhijing, Liu Xinyu, Wu Dexin
Chin. J. Semicond.  2006, 27(6): 963-965
Abstract PDF

MOCVD-grown 0.25μm gate-length AlGaN/GaN high electron mobility transistors (HEMTs) are fabricated on sapphire substrates.A peak extrinsic transconductance of 250mS/mm and a unity current gain cutoff frequency (fT) of 77GHz are obtained for a 0.25μm gate-length single finger device.These power devices exhibit a maximum drain current density as high as 1.07A/mm.On-chip testing yielded a continuous-wave output power of 27.04dBm at 8GHz with an associated power-added efficiency of 26.5% for an 80×10μm device.

MOCVD-grown 0.25μm gate-length AlGaN/GaN high electron mobility transistors (HEMTs) are fabricated on sapphire substrates.A peak extrinsic transconductance of 250mS/mm and a unity current gain cutoff frequency (fT) of 77GHz are obtained for a 0.25μm gate-length single finger device.These power devices exhibit a maximum drain current density as high as 1.07A/mm.On-chip testing yielded a continuous-wave output power of 27.04dBm at 8GHz with an associated power-added efficiency of 26.5% for an 80×10μm device.
High-Power Distributed Feedback Laser Diodes Emitting at 820nm
Fu Shenghui, Zhong Yuan, Song Guofeng, Chen Lianghui
Chin. J. Semicond.  2006, 27(6): 966-969
Abstract PDF

By etching a second-order grating directly into the Al-free optical waveguide region of a ridge-waveguide(RW) AlGaInAs/AlGaAs distributed feedback(DFB) laser diode,a front facet output power of 30mW is obtained at about 820nm with a single longitudinal mode.The Al-free grating surface permits the re-growth of a high-quality cladding layer that yields excellent device performance.The threshold current of these laser diodes is 57mA,and the slope efficiency is about 0.32mW/mA.

By etching a second-order grating directly into the Al-free optical waveguide region of a ridge-waveguide(RW) AlGaInAs/AlGaAs distributed feedback(DFB) laser diode,a front facet output power of 30mW is obtained at about 820nm with a single longitudinal mode.The Al-free grating surface permits the re-growth of a high-quality cladding layer that yields excellent device performance.The threshold current of these laser diodes is 57mA,and the slope efficiency is about 0.32mW/mA.
A Wide-Band Low Noise Amplifier for Terrestrial and Cable Receptions
Ma Desheng, Shi Yin, Dai Fa Foster
Chin. J. Semicond.  2006, 27(6): 970-975
Abstract PDF

We present the design of a wide-band low-noise amplifier (LNA) implemented in 0.35μm SiGe BiCMOS technology for cable and terrestrial tuner applications.The LNA utilizes current injection to achieve high linearity.Without using inductors,the LNA achieves 0.1~1GHz wide bandwidth and 18.8dB gain with less than 1.4dB of gain variation.The noise figure of the wideband LNA is 5dB,and its 1dB compression point is -2dBm and IIP3 is 8dBm.The LNA dissipates 120mW of power with a 5V supply.

We present the design of a wide-band low-noise amplifier (LNA) implemented in 0.35μm SiGe BiCMOS technology for cable and terrestrial tuner applications.The LNA utilizes current injection to achieve high linearity.Without using inductors,the LNA achieves 0.1~1GHz wide bandwidth and 18.8dB gain with less than 1.4dB of gain variation.The noise figure of the wideband LNA is 5dB,and its 1dB compression point is -2dBm and IIP3 is 8dBm.The LNA dissipates 120mW of power with a 5V supply.
PAPERS
Analytical Model for the Piecewise Linearly Graded Doping Drift Region in LDMOS
Sun Weifeng, Yi Yangbo, Lu Shengli, Shi Longxing
Chin. J. Semicond.  2006, 27(6): 976-981
Abstract PDF

A novel 2D analytical model for the doping profile of the bulk silicon RESURF LDMOS drift region is proposed.According to the proposed model,to obtain good performance,the doping profile in the total drift region of a RESURF LDMOS with a field plate should be piecewise linearly graded.The breakdown voltage of the proposed RESURF LDMOS with a piecewise linearly graded doping drift region is improved by 58.8%,and the specific on-resistance is reduced by 87.4% compared with conventional LDMOS.These results are verified by the two-dimensional process simulator Tsuprem-4 and the device simulator Medici.

A novel 2D analytical model for the doping profile of the bulk silicon RESURF LDMOS drift region is proposed.According to the proposed model,to obtain good performance,the doping profile in the total drift region of a RESURF LDMOS with a field plate should be piecewise linearly graded.The breakdown voltage of the proposed RESURF LDMOS with a piecewise linearly graded doping drift region is improved by 58.8%,and the specific on-resistance is reduced by 87.4% compared with conventional LDMOS.These results are verified by the two-dimensional process simulator Tsuprem-4 and the device simulator Medici.
Characterization and Modeling of Finite-Ground Coplanar Waveguides in 0.13μm CMOS
Chen Xu, Wang Zhigong
Chin. J. Semicond.  2006, 27(6): 982-987
Abstract PDF

We discuss the characterization and modeling of coplanar waveguides (CPW) realized in TSMC 0.13μm CMOS process.EM-field simulations with momentum are performed to estimate the important parameters of the transmission lines,such as characteristic impedance and propagation loss.Coplanar waveguide libraries are designed with Z values of 30,50,70,and 100Ω.Finally,the propagation constant and the characteristic impedance are measured in a frequency range from 0.1 to 40GHz with a vector-network analyzer,using the short-open-load-thru (SOLT) de-embedding technique.The distributed parameters of the CPWs are extracted from the measured S-parameters.

We discuss the characterization and modeling of coplanar waveguides (CPW) realized in TSMC 0.13μm CMOS process.EM-field simulations with momentum are performed to estimate the important parameters of the transmission lines,such as characteristic impedance and propagation loss.Coplanar waveguide libraries are designed with Z values of 30,50,70,and 100Ω.Finally,the propagation constant and the characteristic impedance are measured in a frequency range from 0.1 to 40GHz with a vector-network analyzer,using the short-open-load-thru (SOLT) de-embedding technique.The distributed parameters of the CPWs are extracted from the measured S-parameters.
A 2.4GHz Low Power ASK Transmitter for Wireless Capsule Endoscope Applications
Han Shuguang, Chi Baoyong, Wang Zhihua
Chin. J. Semicond.  2006, 27(6): 988-993
Abstract PDF

A 2.4GHz ASK transmitter suitable for a low power wireless capsule endoscope system is presented.A mixer-based frequency up-conversion transmitter architecture is employed to achieve a high data rate.A pseudo-differential stacked class-A power amplifier using the current reuse technique is proposed to save power.The transmitter mainly includes two parts:a 20MHz ASK modulator based on a constant amplitude phase lock loop (PLL) and a direct up-conversion RF circuit.This design,implemented in a TSMC 0.25μm CMOS process,achieves a -23.217dBm output power with a data rate of 1Mbps and dissipates 3.17mA of current with a single 2.5V power supply.

A 2.4GHz ASK transmitter suitable for a low power wireless capsule endoscope system is presented.A mixer-based frequency up-conversion transmitter architecture is employed to achieve a high data rate.A pseudo-differential stacked class-A power amplifier using the current reuse technique is proposed to save power.The transmitter mainly includes two parts:a 20MHz ASK modulator based on a constant amplitude phase lock loop (PLL) and a direct up-conversion RF circuit.This design,implemented in a TSMC 0.25μm CMOS process,achieves a -23.217dBm output power with a data rate of 1Mbps and dissipates 3.17mA of current with a single 2.5V power supply.
An Ultra-Low-Power Embedded EEPROM for Passive RFID Tags
Yan Na, Tan Xi, Zhao Dixian, Min Hao
Chin. J. Semicond.  2006, 27(6): 994-998
Abstract PDF

An ultra-low-power,256-bit EEPROM is designed and implemented in a Chartered 0.35μm EEPROM process.The read state power consumption is optimized using a new sense amplifier structure and an optimized control circuit.Block programming/erasing is achieved using an improved control circuit.An on silicon program/erase/read access time measurement design is given.For a power supply voltage of 1.8V,an average power consumption of 68 and 0.6μA for the program/erase and read operations,respectively,can be achieved at 640kHz.

An ultra-low-power,256-bit EEPROM is designed and implemented in a Chartered 0.35μm EEPROM process.The read state power consumption is optimized using a new sense amplifier structure and an optimized control circuit.Block programming/erasing is achieved using an improved control circuit.An on silicon program/erase/read access time measurement design is given.For a power supply voltage of 1.8V,an average power consumption of 68 and 0.6μA for the program/erase and read operations,respectively,can be achieved at 640kHz.
Design and Analysis of Analog Front-End of Passive RFID Transponders
Hu Jianyun, He Yan, Min Hao
Chin. J. Semicond.  2006, 27(6): 999-1005
Abstract PDF

An analog front-end of HF passive RFID transponders compatible with ISO/IEC 18000-3 is presented.Design considerations,especially the power transmission in the RFID transponder,are analyzed.Based on these considerations,an analog front-end is presented with novel architecture,high power conversion efficiency,low voltage,low power consumption,and high performance in an environment of noise and power fluctuation.The circuit is implemented in a Chartered 0.35μm standard CMOS process.The experimental results show that the chip can satisfy the design target well.

An analog front-end of HF passive RFID transponders compatible with ISO/IEC 18000-3 is presented.Design considerations,especially the power transmission in the RFID transponder,are analyzed.Based on these considerations,an analog front-end is presented with novel architecture,high power conversion efficiency,low voltage,low power consumption,and high performance in an environment of noise and power fluctuation.The circuit is implemented in a Chartered 0.35μm standard CMOS process.The experimental results show that the chip can satisfy the design target well.
High-Speed,Robust CMOS Dynamic Circuit Design
Lai Lianzhang, Tang Tingao, Lin Yinyin
Chin. J. Semicond.  2006, 27(6): 1006-1011
Abstract PDF

A novel circuit with a narrow pulse driving structure is proposed for enhancing the noise immunity and improving the performance of wide fan-in dynamic circuits.Also,an analytical mode that agrees well with simulations is presented for transistor sizing.Simulation results show that an improvement of up to 12% over the conventional technique at 1GHz is obtained with this circuit,which can run 1.6 times faster than the existing technique with the same noise immunity.

A novel circuit with a narrow pulse driving structure is proposed for enhancing the noise immunity and improving the performance of wide fan-in dynamic circuits.Also,an analytical mode that agrees well with simulations is presented for transistor sizing.Simulation results show that an improvement of up to 12% over the conventional technique at 1GHz is obtained with this circuit,which can run 1.6 times faster than the existing technique with the same noise immunity.
Raman Scattering of InAs Quantum Dots with Different Deposition Thicknesses
Zhang Guanjie, Xu Bo, Chen Yonghai, Yao Jianghong, Lin Yaowang, Shu Yongchun, Pi Biao, Xing Xiaodong, Liu Rubin, Shu Qiang, Wang Zhanguo, Xu Jingjun
Chin. J. Semicond.  2006, 27(6): 1012-1015
Abstract PDF

The Raman scattering of InAs/GaAs self-assembled quantum dots(QDs) with different InAs thicknesses is investigated.The vibrational mode,which can be assigned to QD phonons,is observed.Analysis indicates that strain is the most important factor that influences the InAs QD frequency.As the InAs deposition thickness L increases,the InAs-like LO mode frequency decreases,which we attribute to the relaxation of the strain in the QD layer.In another sample with an InAlAs strain buffer layer,the AlAs-like LO mode shows a blue shift as L increases.This also supports the proposed strain relaxation process in QDs.

The Raman scattering of InAs/GaAs self-assembled quantum dots(QDs) with different InAs thicknesses is investigated.The vibrational mode,which can be assigned to QD phonons,is observed.Analysis indicates that strain is the most important factor that influences the InAs QD frequency.As the InAs deposition thickness L increases,the InAs-like LO mode frequency decreases,which we attribute to the relaxation of the strain in the QD layer.In another sample with an InAlAs strain buffer layer,the AlAs-like LO mode shows a blue shift as L increases.This also supports the proposed strain relaxation process in QDs.
Formation of a Single-Layer Si Nanostructure and Its Luminescence Characteristics
Cen Zhanhong, Xu Jun, Li Xin, Li Wei, , Chen San, Liu Yansong, Huang Xinfan
Chin. J. Semicond.  2006, 27(6): 1016-1020
Abstract PDF

Silicon nanostructures with high density (up to 1E11cm-2) and with a lateral size of 10~30nm and a vertical size limited by the film thickness are fabricated on insulating SiNx layers by combining laser irradiation on an ultrathin (4~30nm) amorphous Si film and subsequent thermal annealing.Atomic force microscopy,transmission electron microscopy,and Raman scattering spectroscopy are employed to characterize the surface morphology,crystallization process’ and crystallite.The influence of the laser irradiation and the thickness of the initial amorphous Si layer on the formation of the Si nanostructures is studied.A strong photoluminescence with a peak located at about 660nm,which we tentatively attribute to the crystalline Si grains, can be detected from the 5nm thick crystallized sample.

Silicon nanostructures with high density (up to 1E11cm-2) and with a lateral size of 10~30nm and a vertical size limited by the film thickness are fabricated on insulating SiNx layers by combining laser irradiation on an ultrathin (4~30nm) amorphous Si film and subsequent thermal annealing.Atomic force microscopy,transmission electron microscopy,and Raman scattering spectroscopy are employed to characterize the surface morphology,crystallization process’ and crystallite.The influence of the laser irradiation and the thickness of the initial amorphous Si layer on the formation of the Si nanostructures is studied.A strong photoluminescence with a peak located at about 660nm,which we tentatively attribute to the crystalline Si grains, can be detected from the 5nm thick crystallized sample.
Thermoelectric Properties of p-Type Rare-Earth Element Cerium-Filled Skutterudite CeyFexCo4-xSb12
Wang Kun, Tang Xinfeng, Zhang Qingjie
Chin. J. Semicond.  2006, 27(6): 1021-1025
Abstract PDF

Cobalt-rich filled skutterudite compounds CeyFexCo4-xSb12(y=0~0.42) are synthesized using the melting-diffusion method.The structure and thermoelectric properties of the compounds are investigated.Results indicate that the lattice constants increase linearly with the Ce filling fraction.Hall coefficient is positive.Hole concentration and electrical conductivity decreased as the Ce filling fraction increases.Seebeck coefficient increase with the Ce filling fraction.The lattice thermal conductivity reached the minimum value when the Ce filling fraction was about 0.29,indicating that the effect of Ce rattling on phonon scattering is the strongest as Sb-dodecahedron partial voids are filled by Ce.A maximum ZT value of 0.65 is obtained for Ce0.29Fe1.41Co2.59Sb12.32 at 725K.

Cobalt-rich filled skutterudite compounds CeyFexCo4-xSb12(y=0~0.42) are synthesized using the melting-diffusion method.The structure and thermoelectric properties of the compounds are investigated.Results indicate that the lattice constants increase linearly with the Ce filling fraction.Hall coefficient is positive.Hole concentration and electrical conductivity decreased as the Ce filling fraction increases.Seebeck coefficient increase with the Ce filling fraction.The lattice thermal conductivity reached the minimum value when the Ce filling fraction was about 0.29,indicating that the effect of Ce rattling on phonon scattering is the strongest as Sb-dodecahedron partial voids are filled by Ce.A maximum ZT value of 0.65 is obtained for Ce0.29Fe1.41Co2.59Sb12.32 at 725K.
Growth and Properties of Cd0.8Mn0.2Te Crystal
Zhang Jijun, Jie Wanqi
Chin. J. Semicond.  2006, 27(6): 1026-1029
Abstract PDF

By optimizing growth parameters,a vertical Bridgman method is successfully used to grow a Cd0.8Mn0.2Te crystal with a size of Φ30mm×120mm.The as-grown crystal is characterized by X-ray powder diffractometer,X-ray double-crystal diffractometer,ultraviolet visible-near infrared spectrum,and IR transmittance and resistivity measurements.The results show that the as-grown crystal has a cubic structure with lattice constant a≈0.6454nm,and its absorption edge is 720nm,corresponding to the band gap of 1.722eV.The results also show high crystallinity,high IR transmittance,and high resistivity.The effect of crystal defects on the IR transmittance and resistivity is discussed.

By optimizing growth parameters,a vertical Bridgman method is successfully used to grow a Cd0.8Mn0.2Te crystal with a size of Φ30mm×120mm.The as-grown crystal is characterized by X-ray powder diffractometer,X-ray double-crystal diffractometer,ultraviolet visible-near infrared spectrum,and IR transmittance and resistivity measurements.The results show that the as-grown crystal has a cubic structure with lattice constant a≈0.6454nm,and its absorption edge is 720nm,corresponding to the band gap of 1.722eV.The results also show high crystallinity,high IR transmittance,and high resistivity.The effect of crystal defects on the IR transmittance and resistivity is discussed.
Study of Incubation Layers in Microcrystalline Silicon Solar Cells
Zhang Xiaodan, Zhao Ying, Gao Yantao, Zhu Feng, Wei Changchun, , Sun Jian, Geng Xinhua
Chin. J. Semicond.  2006, 27(6): 1030-1033
Abstract PDF

The structure of microcrystalline silicon thin film solar cells prepared by very high frequency plasma enhanced chemical vapor deposition,is studied.Raman measurements indicate that there is an amorphous incubation layer at the p/i interface in the solar cells.The thickness of the incubation layer increases with increasing silane concentration and decreasing discharge power.A suitable silane concentration and discharge power can be used to reduce the thickness of the incubation layer.

The structure of microcrystalline silicon thin film solar cells prepared by very high frequency plasma enhanced chemical vapor deposition,is studied.Raman measurements indicate that there is an amorphous incubation layer at the p/i interface in the solar cells.The thickness of the incubation layer increases with increasing silane concentration and decreasing discharge power.A suitable silane concentration and discharge power can be used to reduce the thickness of the incubation layer.
Properties of a Photonic Crystal Microcavity
Zhao Zhimin, Xu Xingsheng, Li Fang, Liu Yuliang, Chen Hongda
Chin. J. Semicond.  2006, 27(6): 1034-1037
Abstract PDF

In order to design a new type of photonic crystal microcavity with a high quality factor and to study the relationship between the resonant mode wavelength and the lattice constant of a single-defect photonic crystal microcavity,the finite difference time-domain method and the Padé approximation together with Baker’s algorithm are employed to calculate the resonant mode wavelength and quality factor of air hole photonic crystal microcavities made of semiconductor material.The quality factor of this photonic crystal microcavity is 246510,and it has a linear relationship such that a change of three nanometers in the resonant mode wavelength results in a change of only one nanometer in the lattice constant of the single defect photonic crystal microcavity for a fixed hole radius.These results provide theoretical instruction for fabricating photonic crystal microcavity lasers.

In order to design a new type of photonic crystal microcavity with a high quality factor and to study the relationship between the resonant mode wavelength and the lattice constant of a single-defect photonic crystal microcavity,the finite difference time-domain method and the Padé approximation together with Baker’s algorithm are employed to calculate the resonant mode wavelength and quality factor of air hole photonic crystal microcavities made of semiconductor material.The quality factor of this photonic crystal microcavity is 246510,and it has a linear relationship such that a change of three nanometers in the resonant mode wavelength results in a change of only one nanometer in the lattice constant of the single defect photonic crystal microcavity for a fixed hole radius.These results provide theoretical instruction for fabricating photonic crystal microcavity lasers.
Calculation of the Efficiency of GaAs Quantum Well Solar Cells
Wang Jianbo, Xiang Bing, Lou Chaogang, Zhang Xiaobing, Lei Wei, Mu Hui, Sun Qiang
Chin. J. Semicond.  2006, 27(6): 1038-1041
Abstract PDF

The conversion efficiency of GaAs quantum well solar cells is calculated using detailed balance model.We discuss the effects of the quantum well structure on the cell’s conversion efficiency (for example,quasi-Fermi level variations and hot carrier transport).We also investigate the effects of the impact ionization process in the quantum well structure on the conversion efficiency.The results show that impact ionization can help increase the conversion efficiency to some extent.

The conversion efficiency of GaAs quantum well solar cells is calculated using detailed balance model.We discuss the effects of the quantum well structure on the cell’s conversion efficiency (for example,quasi-Fermi level variations and hot carrier transport).We also investigate the effects of the impact ionization process in the quantum well structure on the conversion efficiency.The results show that impact ionization can help increase the conversion efficiency to some extent.
GaAs/GaN Direct Wafer Bonding Based on Hydrophilic Surface Treatment
Wang Hui, Guo Xia, Liang Ting, Liu Shiwen, Gao Guo, Shen Guangdi
Chin. J. Semicond.  2006, 27(6): 1042-1045
Abstract PDF

GaAs and GaN wafer pairs are successfully bonded based on the hydrophilic surface treatment.The bonding is carried out at 500℃ in N2 atmosphere for 10min.It is found that a large fraction of the interface area is well bonded.SEM results indicate that there is no air gap at the bonding interface.PL measurements indicate that the crystal structure is slightly affected by the wafer bonding process.Visible light transmission measurements indicate that the GaAs/GaN bonded interface is translucent.Success in GaAs/GaN direct wafer bonding has great implications for the integration of GaAs and GaN semiconductor materials.

GaAs and GaN wafer pairs are successfully bonded based on the hydrophilic surface treatment.The bonding is carried out at 500℃ in N2 atmosphere for 10min.It is found that a large fraction of the interface area is well bonded.SEM results indicate that there is no air gap at the bonding interface.PL measurements indicate that the crystal structure is slightly affected by the wafer bonding process.Visible light transmission measurements indicate that the GaAs/GaN bonded interface is translucent.Success in GaAs/GaN direct wafer bonding has great implications for the integration of GaAs and GaN semiconductor materials.
Light-Assisted Wet Etching of Dislocations in GaN Grown on Silicon
Zhao Liwei, Liu Caichi, Teng Xiaoyun, Hao Qiuyan, Zhu Junshan, Sun Shilong, Wang Haiyun, Xu Yuesheng, Feng Yuchun, Guo Baoping
Chin. J. Semicond.  2006, 27(6): 1046-1050
Abstract PDF

A new method for the light-assisted wet etching of GaN is demonstrated,the light source for which is a tungsten halide lamp.The dislocation density and surface morphology are investigated by scanning electron microscopy and atomic force microscopy,and an optimal etching morphology is obtained.It is also demonstrated that the light source induces electron-hole pairs and enhances the etching rate at the dislocation sites.Many hexagonal etching pits,which emergence at the dislocations,are observed.The etching mechanism is discussed,and an optimal etching condition is proposed.

A new method for the light-assisted wet etching of GaN is demonstrated,the light source for which is a tungsten halide lamp.The dislocation density and surface morphology are investigated by scanning electron microscopy and atomic force microscopy,and an optimal etching morphology is obtained.It is also demonstrated that the light source induces electron-hole pairs and enhances the etching rate at the dislocation sites.Many hexagonal etching pits,which emergence at the dislocations,are observed.The etching mechanism is discussed,and an optimal etching condition is proposed.
Fabrication of ZnO Thin-Film Transistors by L-MBE
Zhang Xin’an, Zhang Jingwen, Yang Xiaodong, Lou Hui, , Liu Zhenling, Zhang Weifeng
Chin. J. Semicond.  2006, 27(6): 1051-1054
Abstract PDF

High quality ZnO films are deposited on SiNx/Si substrate by laser molecular beam epitaxy(L-MBE).XRD and AFM are used to investigate the crystallite and surface of the films, respectively.The results show that the films are homogeneous and crack-free with highly preferred c orientation.We fabricate thin film transistors with ZnO as an active channel layer that works well in the n-channel enhancement mode and have a threshold voltage of 17.5V and a mobility rate as high as 1.05cm2/(V·s).

High quality ZnO films are deposited on SiNx/Si substrate by laser molecular beam epitaxy(L-MBE).XRD and AFM are used to investigate the crystallite and surface of the films, respectively.The results show that the films are homogeneous and crack-free with highly preferred c orientation.We fabricate thin film transistors with ZnO as an active channel layer that works well in the n-channel enhancement mode and have a threshold voltage of 17.5V and a mobility rate as high as 1.05cm2/(V·s).
Correlations Between an AlN Insert Layer and Current Collapse in AlGaN/GaN HEMTs
Li Chengzhan, Liu Jian, Liu Xinyu, Xue Lijun, Chen Xiaojuan, He Zhijing
Chin. J. Semicond.  2006, 27(6): 1055-1058
Abstract PDF

Based on a comparison of the degree of drain current collapse in AlGaN/GaN HEMTs with and without an AlN insert layer under short-term DC bias stress,the effects of an AlN insert layer on current collapse induced by DC bias stress are investigated.Under some DC bias stress,the degree of drain current collapse of AlGaN/GaN HEMTs with an AlN insert layer is less prominent than that with no AlN insert layer,indicating that an AlN insert layer can inhibit current collapse effectively.The energy band structures of AlGaN/GaN HEMTs with and without AlN insert layers make clear that an AlN insert layer raises the conductance band and increases the effective heterostructure band discontinuity ΔEc prominently,which is beneficial for strengthening the quantum limitation of 2DEG and decreasing the probability of hot electron tunneling through the AlGaN barrier layer to the surface.Therefore,an AlN insert layer appears to inhibit current collapse.

Based on a comparison of the degree of drain current collapse in AlGaN/GaN HEMTs with and without an AlN insert layer under short-term DC bias stress,the effects of an AlN insert layer on current collapse induced by DC bias stress are investigated.Under some DC bias stress,the degree of drain current collapse of AlGaN/GaN HEMTs with an AlN insert layer is less prominent than that with no AlN insert layer,indicating that an AlN insert layer can inhibit current collapse effectively.The energy band structures of AlGaN/GaN HEMTs with and without AlN insert layers make clear that an AlN insert layer raises the conductance band and increases the effective heterostructure band discontinuity ΔEc prominently,which is beneficial for strengthening the quantum limitation of 2DEG and decreasing the probability of hot electron tunneling through the AlGaN barrier layer to the surface.Therefore,an AlN insert layer appears to inhibit current collapse.
Transport Current Model of SiGe HBT
Hu Huiyong, Zhang Heming, Dai Xianying, Xuan Rongxi, Cui Xiaoying, Wang Qing, Jiang Tao
Chin. J. Semicond.  2006, 27(6): 1059-1063
Abstract PDF

Based on the large signal equivalent circuit model of SiGe heterojunction bipolar transistor(HBT),a SiGe HBT transport current model is developed that takes the influence on carrier transport of the energy band discontinuity of the emitter into account.The model features the definite physical meaning and simple topology.The simulated results agree well with the results theoretically analyzed in other literature.The DC characteristic simulated by PSPICE,into which the model is embedded,is in accord with that in other literatures.

Based on the large signal equivalent circuit model of SiGe heterojunction bipolar transistor(HBT),a SiGe HBT transport current model is developed that takes the influence on carrier transport of the energy band discontinuity of the emitter into account.The model features the definite physical meaning and simple topology.The simulated results agree well with the results theoretically analyzed in other literature.The DC characteristic simulated by PSPICE,into which the model is embedded,is in accord with that in other literatures.
A Novel InGaP/InGaAs/GaAs DHBT Grown by MBE Using Beryllium as p-Type Dopant
Su Shubing, Xu Anhuai, Liu Xinyu, Qi Ming, Liu Xunchun, Wang Runmei
Chin. J. Semicond.  2006, 27(6): 1064-1067
Abstract PDF

We fabricate a novel InGaP/InGaAs/GaAs double hetero-junction bipolar junction (DHBT) with an InGaAs base for the first time in China. Good DC performance is obtained.The common-emitter DC current gain is 100,the offset voltage approximates 0.4V,the knee voltage is about 1.0V,and the open-base breakdown voltage is over 10V.The ideality factors for the base and collector current are 1.16 and 1.11 respectively.These results indicate that the InGaP/InGaAs/GaAs DHBTs are suitable for applications in low power-dissipation and high power.

We fabricate a novel InGaP/InGaAs/GaAs double hetero-junction bipolar junction (DHBT) with an InGaAs base for the first time in China. Good DC performance is obtained.The common-emitter DC current gain is 100,the offset voltage approximates 0.4V,the knee voltage is about 1.0V,and the open-base breakdown voltage is over 10V.The ideality factors for the base and collector current are 1.16 and 1.11 respectively.These results indicate that the InGaP/InGaAs/GaAs DHBTs are suitable for applications in low power-dissipation and high power.
Numerical Simulation and Analysis of SiGeC/Si Heterojunction Power Diodes
Gao Yong, Liu Jing, Ma Li, Yu Mingbin
Chin. J. Semicond.  2006, 27(6): 1068-1072
Abstract PDF

A novel SiGeC/Si heterojunction structure for p-i-n power diodes is presented.Based on analysis of the physical characteristics of SiGeC alloys,models of the physical parameters are given,and the effects on the device characteristics of the incorporation of carbon are simulated and analyzed with MEDICI.The reverse leakage current is also compared for devices with different p+ region thicknesses.The simulation results indicate that the reverse leakage current and the dependence of the device characteristics on a critical thickness are reduced greatly,and the stability is improved by the incorporation of carbon atoms into SiGe/Si diodes,when the forward I-V and reverse recovery characteristics remain constant.

A novel SiGeC/Si heterojunction structure for p-i-n power diodes is presented.Based on analysis of the physical characteristics of SiGeC alloys,models of the physical parameters are given,and the effects on the device characteristics of the incorporation of carbon are simulated and analyzed with MEDICI.The reverse leakage current is also compared for devices with different p+ region thicknesses.The simulation results indicate that the reverse leakage current and the dependence of the device characteristics on a critical thickness are reduced greatly,and the stability is improved by the incorporation of carbon atoms into SiGe/Si diodes,when the forward I-V and reverse recovery characteristics remain constant.
Optimization of BSIM3 I-V Modeling of High Voltage MOS Devices
Ren Zheng, Shi Yanling, , Hu Shaojian, Jin Meng, Zhu Jun, Chen Shoumian
Chin. J. Semicond.  2006, 27(6): 1073-1077
Abstract PDF

This paper presents a technique for modeling high-voltage, lightly-doped-drain MOS (HV MOS) devices widely used in high voltage ICs.In order to improve BSIM3v3 SPICE I-V for modeling HV MOS devices,measurements on HV MOS devices are performed with an Agilent ICCAP system.The results reveal the Rds’s dependence on Vgs,Vds,and Vbs.The theory of HV MOS devices is analyzed,and the algorithms the Rds and Vdsat in the BSIM3v3 model are optimized in the BSIM3v3 source code.Three parameters are added:a gate bias quadric coefficient of Rds(Prwg2) and two gate bias coefficients of δ(δ1,δ2).The free source code of the SPICE simulator and the BSIM3v3 library are modified and compiled.With this optimized simulator,the simulated I-V data for HV MOS devices after parameter extraction fit the measured results very well.

This paper presents a technique for modeling high-voltage, lightly-doped-drain MOS (HV MOS) devices widely used in high voltage ICs.In order to improve BSIM3v3 SPICE I-V for modeling HV MOS devices,measurements on HV MOS devices are performed with an Agilent ICCAP system.The results reveal the Rds’s dependence on Vgs,Vds,and Vbs.The theory of HV MOS devices is analyzed,and the algorithms the Rds and Vdsat in the BSIM3v3 model are optimized in the BSIM3v3 source code.Three parameters are added:a gate bias quadric coefficient of Rds(Prwg2) and two gate bias coefficients of δ(δ1,δ2).The free source code of the SPICE simulator and the BSIM3v3 library are modified and compiled.With this optimized simulator,the simulated I-V data for HV MOS devices after parameter extraction fit the measured results very well.
A Dynamic-State Model of an NPT-IGBT with Localized Lifetime Control
Fang Jian, Wu Chao, Qiao Ming, Zhang Bo, Li Zhaoji
Chin. J. Semicond.  2006, 27(6): 1078-1083
Abstract PDF

A novel dynamic-state model of an NPT-IGBT with localized lifetime control is proposed and is verified by the 2D simulator MEDICI.In this model,the quasi-static-state approximation is used,and the turn-off stage is divided into two stages, including a fast turn-off and a slow turn-off, to characterize the turn-off.With this model,the dynamic characteristics of a localized lifetime control NPT-IGBT,as influenced by the parameters of the localized low-lifetime region,are discussed in detail.This model is helpful for understanding the physical mechanisms in an NPT-IGBT with localized lifetime control during the turn-off period and can be used to the direct design and optimization of an NPT-IGBT.The modeling and analysis methods used here are universal and also can be used in other conductivity modulation power devices.

A novel dynamic-state model of an NPT-IGBT with localized lifetime control is proposed and is verified by the 2D simulator MEDICI.In this model,the quasi-static-state approximation is used,and the turn-off stage is divided into two stages, including a fast turn-off and a slow turn-off, to characterize the turn-off.With this model,the dynamic characteristics of a localized lifetime control NPT-IGBT,as influenced by the parameters of the localized low-lifetime region,are discussed in detail.This model is helpful for understanding the physical mechanisms in an NPT-IGBT with localized lifetime control during the turn-off period and can be used to the direct design and optimization of an NPT-IGBT.The modeling and analysis methods used here are universal and also can be used in other conductivity modulation power devices.
Wide-Band 2π Equivalent-Circuit Model for Spiral Inductors on Silicon
Yang Fan, Wang Xiangzhan, Zheng Wei, Ren Jun, You Huancheng, Li Liping, Yang Mohua
Chin. J. Semicond.  2006, 27(6): 1084-1088
Abstract PDF

A novel physical model is proposed for monolithic RF spiral inductor on high-loss silicon substrate.This model takes the following factors into account: the functions of skin effect,proximity effect,and eddy current losses in the substrate to frequency-dependent series parameters Ls and Rs in light of modified partial equivalent element circuit methodology and a full-coupled transformer loop.Also, distributed characteristics of parasitic capacitance are captured by a 2π equivalent-circuit.Up to 15GHz,the model is quite accurate.The results are within 8% of data from a full-wave electromagnetic field simulator,including equivalent inductor Leff,resistor Reff,and quality factor Q.Hopefully,it can be applied to further theory research and optimum design of RFIC spiral inductors on Si.

A novel physical model is proposed for monolithic RF spiral inductor on high-loss silicon substrate.This model takes the following factors into account: the functions of skin effect,proximity effect,and eddy current losses in the substrate to frequency-dependent series parameters Ls and Rs in light of modified partial equivalent element circuit methodology and a full-coupled transformer loop.Also, distributed characteristics of parasitic capacitance are captured by a 2π equivalent-circuit.Up to 15GHz,the model is quite accurate.The results are within 8% of data from a full-wave electromagnetic field simulator,including equivalent inductor Leff,resistor Reff,and quality factor Q.Hopefully,it can be applied to further theory research and optimum design of RFIC spiral inductors on Si.
Optimum Design of PSJ for High-Voltage Devices
Chen Wanjun, Zhang Bo, Li Zhaoji, Deng Xiaochuan
Chin. J. Semicond.  2006, 27(6): 1089-1093
Abstract PDF

A novel design for a high-voltage PSJ (partial super junction) is proposed.The ratio of the SJ region varies from 0 to 1.Through analysis of the specific on-resistance of the PSJ device,a theory of PSJ optimization is developed.Based on this result,the specific on-resistances at different breakdown voltages are calculated and compared with the simulation and experimental results.The influence on the specific on-resistance of the PSJ is discussed in detail,including the punch-through factor of the BAL region η,the normalized depth of p column r,the aspect ratio of p column A,and the uniformity of the concentration of the SJ region.The theoretical results agree with the simulation. The theory is an academic element for the optimization of PSJS for high-voltage devices.

A novel design for a high-voltage PSJ (partial super junction) is proposed.The ratio of the SJ region varies from 0 to 1.Through analysis of the specific on-resistance of the PSJ device,a theory of PSJ optimization is developed.Based on this result,the specific on-resistances at different breakdown voltages are calculated and compared with the simulation and experimental results.The influence on the specific on-resistance of the PSJ is discussed in detail,including the punch-through factor of the BAL region η,the normalized depth of p column r,the aspect ratio of p column A,and the uniformity of the concentration of the SJ region.The theoretical results agree with the simulation. The theory is an academic element for the optimization of PSJS for high-voltage devices.
A K-Band MMIC Medium Power Amplifier for Automotive Radars
Wang Chuang, Qian Rong, Sun Xiaowei
Chin. J. Semicond.  2006, 27(6): 1094-1097
Abstract PDF

This paper describes a compact K-band single stage MMIC broad-band power amplifier (PA).The PA is fabricated in an advanced 0.25μm power PHEMT process.At 21~28GHz,the PA has a 21dBm P1dB(1dB gain compression point) output power when Vd=6V,Vg=-0.25V,and Ids=82mA.It also has a small signal gain of 7dB.VSWRs are below 3 and 2,respectively,for the input and output ports.The chip dimensions are 1mm×1.2mm×0.1mm.In addition,we give a full layout EM simulation solution,which agrees well with the measurement.

This paper describes a compact K-band single stage MMIC broad-band power amplifier (PA).The PA is fabricated in an advanced 0.25μm power PHEMT process.At 21~28GHz,the PA has a 21dBm P1dB(1dB gain compression point) output power when Vd=6V,Vg=-0.25V,and Ids=82mA.It also has a small signal gain of 7dB.VSWRs are below 3 and 2,respectively,for the input and output ports.The chip dimensions are 1mm×1.2mm×0.1mm.In addition,we give a full layout EM simulation solution,which agrees well with the measurement.
Large Two-Dimensional Photonic Band-Gaps Designed by Rapid Genetic Algorithms
Gong Chunjuan, Hu Xiongwei
Chin. J. Semicond.  2006, 27(6): 1098-1102
Abstract PDF

The plane wave expansion method (PWM) and rapid genetic algorithm (RGA) are used to design two-dimensional photonic crystals with large complete band-gaps.The algorithms evolve from randomly generated photonic crystals and integrate a filling fraction controlling operator and Fourier transform data storage mechanism to run efficiently and effectively.The obtained optimal photonic crystal has a large band gap with a relative width of 13.25% and can be easily fabricated due to large pixel.

The plane wave expansion method (PWM) and rapid genetic algorithm (RGA) are used to design two-dimensional photonic crystals with large complete band-gaps.The algorithms evolve from randomly generated photonic crystals and integrate a filling fraction controlling operator and Fourier transform data storage mechanism to run efficiently and effectively.The obtained optimal photonic crystal has a large band gap with a relative width of 13.25% and can be easily fabricated due to large pixel.
Characteristic of a Vertically-Coupled Triple Microring Resonant Wavelength Multi/Demultiplexer
Yan Xin, Ma Chunsheng, Wang Xianyin, Xu Yuanzhe, E Shulin, Zhang Daming
Chin. J. Semicond.  2006, 27(6): 1103-1108
Abstract PDF

Transmission characteristics are analyzed,and general formulas for the transfer functions are presented for a Si-based vertically-coupled triple microring resonant wavelength multi/demultiplexer with 1×N channels.The simulated results show that this device can demultiplex 8 different wavelengths around the central wavelength of 1550.918nm with a wavelength spacing of 1.6nm.The device possesses a flat box-like spectral response,its 3dB bandwidth is about 0.28m,its inserted loss is less than 0.71dB,and its crosstalk is below -53dB for every output channel.

Transmission characteristics are analyzed,and general formulas for the transfer functions are presented for a Si-based vertically-coupled triple microring resonant wavelength multi/demultiplexer with 1×N channels.The simulated results show that this device can demultiplex 8 different wavelengths around the central wavelength of 1550.918nm with a wavelength spacing of 1.6nm.The device possesses a flat box-like spectral response,its 3dB bandwidth is about 0.28m,its inserted loss is less than 0.71dB,and its crosstalk is below -53dB for every output channel.
Diffraction Coupling of a Very Long Wavelength Quantum Well Infrared Photodetector Linear Array
Guo Fangmin, Li Ning, Yu Shaoxin, Xiong Dayuan, Lin Jianfeng, Hou Ying, He Yuhuan, Zhu Ziqiang, Lu Wei, Huang Qi, Zhou Junming
Chin. J. Semicond.  2006, 27(6): 1109-1114
Abstract PDF

Through experiment,test,and analysis,we study the surface near-field effect and optical coupling efficiency of very long wavelength quantum well infrared photodetectors (QWIP).We apply finite difference time domain modeling and the modal expansion method,and we review different diffraction couplings and different processes and consider their coupling efficiency.The experiment and analysis prove that effective grating coupling can be achieved through the reasonable design of a 2D grating for very long wavelength QWIPs.

Through experiment,test,and analysis,we study the surface near-field effect and optical coupling efficiency of very long wavelength quantum well infrared photodetectors (QWIP).We apply finite difference time domain modeling and the modal expansion method,and we review different diffraction couplings and different processes and consider their coupling efficiency.The experiment and analysis prove that effective grating coupling can be achieved through the reasonable design of a 2D grating for very long wavelength QWIPs.
Effects of Reverse Substrate Bias on the Endurance Degradation of FLASH Memory Devices
Shi Kai, Xu Mingzhen, Tan Changhua
Chin. J. Semicond.  2006, 27(6): 1115-1119
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The effects of reverse substrate bias on the endurance degradation of ETOXTM FLASH memory devices under the stress mode VFG≈VD/2 are investigated.The results indicate that as the reverse substrate bias increases the injection efficiency,the endurance degradation of the device is minimized under certain reverse substrate bias.Taking both the device endurance degradation and the injection efficiency into account,a FLASH memory device with optimal reverse substrate bias under the stress mode VFG≈VD/2 is obtained with the minimum endurance degradation and the greatest injection efficiency.

The effects of reverse substrate bias on the endurance degradation of ETOXTM FLASH memory devices under the stress mode VFG≈VD/2 are investigated.The results indicate that as the reverse substrate bias increases the injection efficiency,the endurance degradation of the device is minimized under certain reverse substrate bias.Taking both the device endurance degradation and the injection efficiency into account,a FLASH memory device with optimal reverse substrate bias under the stress mode VFG≈VD/2 is obtained with the minimum endurance degradation and the greatest injection efficiency.
Simulation and Optimization of FD SOI CMOS Devices at High Temperatures
Liu Mengxin, Gao Yong, Zhang Xin, Wang Cailin, Yang Yuan
Chin. J. Semicond.  2006, 27(6): 1120-1124
Abstract PDF

Simulations of fully depleted SOI CMOS devices are carried out using the ISE TCAD DESSIS device simulator in order to predict and analyze temperature effects in a temperature range of 300~600K.Comprehensive static and transient characteristics of SOI CMOS inverters are obtained.Furthermore,a new device structure called AlN-DSOI is proposed.The results indicate that,the threshold voltages of SOI CMOS circuits are sensitive to temperature.A significant reduction in output characteristics occurs as a result of an increase in ambient temperature.In addition,the transient simulations reveal how speed and power depend on ambient temperature.The improved structure has better electrical and driving performance on the basis of releasing the floating body effects and the thermal transfer problem in SOI circuits.

Simulations of fully depleted SOI CMOS devices are carried out using the ISE TCAD DESSIS device simulator in order to predict and analyze temperature effects in a temperature range of 300~600K.Comprehensive static and transient characteristics of SOI CMOS inverters are obtained.Furthermore,a new device structure called AlN-DSOI is proposed.The results indicate that,the threshold voltages of SOI CMOS circuits are sensitive to temperature.A significant reduction in output characteristics occurs as a result of an increase in ambient temperature.In addition,the transient simulations reveal how speed and power depend on ambient temperature.The improved structure has better electrical and driving performance on the basis of releasing the floating body effects and the thermal transfer problem in SOI circuits.
Design and Fabrication of Excellent Ultra-Broad Digital Attenuator Chips
Wang Huizhi, Li Fuxiao
Chin. J. Semicond.  2006, 27(6): 1125-1128
Abstract PDF

This paper describes the design,fabrication,and testing of an MMIC digital attenuator covering the range of 50MHz~20GHz and also describes in detail how to realize an ultra-broad attenuator.This attenuator is fabricated in a 0.5μm ion-implanted process.The attenuator shows exceptional performance,with an insertion loss of reference state of less than 5dB.The input and output VSWRs are better than 15∶1 over all states and the entire frequency range.The attenuation accuracy is within ±0.3dB (the actual attenuation-the attenuation setting).The phase variation (reference to insertion state) is between -5°~20°.The 1dB compression point is 22dBm(at 10GHz).

This paper describes the design,fabrication,and testing of an MMIC digital attenuator covering the range of 50MHz~20GHz and also describes in detail how to realize an ultra-broad attenuator.This attenuator is fabricated in a 0.5μm ion-implanted process.The attenuator shows exceptional performance,with an insertion loss of reference state of less than 5dB.The input and output VSWRs are better than 15∶1 over all states and the entire frequency range.The attenuation accuracy is within ±0.3dB (the actual attenuation-the attenuation setting).The phase variation (reference to insertion state) is between -5°~20°.The 1dB compression point is 22dBm(at 10GHz).
A Highly Sensitive Local Curvature Metrology for Internal Stress Detection in Thin Films
Wang Shasha, Chen Jing, Li Dachao, , Huang Yubo
Chin. J. Semicond.  2006, 27(6): 1129-1135
Abstract PDF

Novel local curvature test structures combined with a sub-nanometer optical interferometry measurement setup are developed to detect stresses in nanometer-scale films and ultra low stresses in thin films.Several "localized" test structures based on the bending plate measurement method are designed to improve its sensitivity and accuracy.FEM analysis is performed to calculate the deviation of boundary-introduced stress from that predicted by the Stoney formula.Optimized structures are fabricated with anisotropic etching and DRIE.Stress values obtained with this metrology are in good agreement with those extracted by other methods,and repeatability within 1% is achieved.Stress differences as small as 1.5MPa in the 30nm film can be resolved.Such resolution is among the finest in the world.

Novel local curvature test structures combined with a sub-nanometer optical interferometry measurement setup are developed to detect stresses in nanometer-scale films and ultra low stresses in thin films.Several "localized" test structures based on the bending plate measurement method are designed to improve its sensitivity and accuracy.FEM analysis is performed to calculate the deviation of boundary-introduced stress from that predicted by the Stoney formula.Optimized structures are fabricated with anisotropic etching and DRIE.Stress values obtained with this metrology are in good agreement with those extracted by other methods,and repeatability within 1% is achieved.Stress differences as small as 1.5MPa in the 30nm film can be resolved.Such resolution is among the finest in the world.
Electromigration of SnAgCu Solder Interconnects
Wu Yiping, , Zhang Jinsong, Wu Fengshun
Chin. J. Semicond.  2006, 27(6): 1136-1140
Abstract PDF

The electromigration (EM) of Sn96Ag3.5Cu0.5 solder interconnects is studied with Ni diffusion-barrier layers.The results show that at 180℃,intermetallic-compounds (IMCs) move in the direction of electron-flow and their evolution pre-sents a unique polarity effect.IMCs ripen,split,and migrate from the Ni/solder interface at the cathode,while accumulate at the anode area nearby.This IMC migration generates mass depletion at the cathode,which causes void nucleation and propagation on the UBM/solder interface.Large voids increase the measured resistance and deteriorate the conductive path noticeably,thereby seriously degrade the solder interconnect reliability.

The electromigration (EM) of Sn96Ag3.5Cu0.5 solder interconnects is studied with Ni diffusion-barrier layers.The results show that at 180℃,intermetallic-compounds (IMCs) move in the direction of electron-flow and their evolution pre-sents a unique polarity effect.IMCs ripen,split,and migrate from the Ni/solder interface at the cathode,while accumulate at the anode area nearby.This IMC migration generates mass depletion at the cathode,which causes void nucleation and propagation on the UBM/solder interface.Large voids increase the measured resistance and deteriorate the conductive path noticeably,thereby seriously degrade the solder interconnect reliability.
Raman Online Measurement of Stress Resulting from Micromachining
Sang Shengbo, Xue Chenyang, Zhang Wendong, Xiong Jijun, Ruan Yong, Zhang Dacheng, Hao Yilong
Chin. J. Semicond.  2006, 27(6): 1141-1146
Abstract PDF

Micromachining can result in residual stress in a wafer.This paper puts forward an online measuring method for measuring the stress in silicon samples prepared with three common micromachining processes:deposition,etching,and bonding.The experimental results support the theory.In deposition processes,the residual stress resulting from Si3N4,which is tensile stress,is larger than SiO2,which is compressive stress.The tensile stress resulting from etching and bonding processes is relatively larger with a maximum value over 300MPa.

Micromachining can result in residual stress in a wafer.This paper puts forward an online measuring method for measuring the stress in silicon samples prepared with three common micromachining processes:deposition,etching,and bonding.The experimental results support the theory.In deposition processes,the residual stress resulting from Si3N4,which is tensile stress,is larger than SiO2,which is compressive stress.The tensile stress resulting from etching and bonding processes is relatively larger with a maximum value over 300MPa.
Fabrication of Micro Zone Plates by E-Beam and X-Ray Lithography
Wang Deqiang, Cao Leifeng, Xie Changqing, Ye Tianchun
Chin. J. Semicond.  2006, 27(6)
Abstract PDF

This paper introduces a method for fabricating state-of-the-art micro-zone plates(MZP) on free-standing silicon nitride based on silicon using electron beam lithography and positive resist ZEP 520A.A bright field MZP master mask with an outermost width of 150nm is fabricated with an e-beam machine.In order to get the dark field high aspect ratio and the batch product of the MZP,we replicate the MZP mask by using synchrotron radiation X-ray lithography(XRL).Finally,we successfully replicate an MZP for an ICF diagnostics experiment.

This paper introduces a method for fabricating state-of-the-art micro-zone plates(MZP) on free-standing silicon nitride based on silicon using electron beam lithography and positive resist ZEP 520A.A bright field MZP master mask with an outermost width of 150nm is fabricated with an e-beam machine.In order to get the dark field high aspect ratio and the batch product of the MZP,we replicate the MZP mask by using synchrotron radiation X-ray lithography(XRL).Finally,we successfully replicate an MZP for an ICF diagnostics experiment.