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Volume 34, Issue 5, May 2013
SEMICONDUCTOR PHYSICS
Magnetic field and temperature dependence of the properties of the ground state of the strong-coupling bound magnetopolaron in quantum rods with hydrogenic impurity
Wei Xin, Yuwei Zhao, Chao Han, Eerdunchaolu
J. Semicond.  2013, 34(5): 052001  doi: 10.1088/1674-4926/34/5/052001

Magnetic field and temperature dependence of the properties of the ground state of the strong-coupling bound magnetopolaron in quantum rods (QRs) with hydrogenic impurity is studied by means of the Huybrechts-Lee-Low-Pines transformation method and the quantum statistical theory. The expressions for the ground-state energy and the mean number of phonons of the magnetopolaron are derived. Results of the numerical calculations show that the bound state of the magnetopolaron cannot be formed when the value of the aspect ratio of the QR, the dielectric constant ratio, the electron-phonon coupling strength or the temperature parameter is small. The larger the deviation of the value of aspect ratio e' from 1 is, the more it is unfavorable to the stability of the ground state of the magnetopolaron. When the magnetopolaron is in the bound state, the absolute value of its ground-state energy and its mean number of phonons increase with an increase of the dielectric constant ratio and confinement strength of QRs, but decrease with an increase in the cyclotron frequency of the external magnetic field and the temperature. The absolute value of the ground-state energy and the mean number of phonons of the magnetopolaron decrease with decreasing e' when e' < 1, but decrease with increasing e' when e' > 1. They get the maximum value at e'=1.

Magnetic field and temperature dependence of the properties of the ground state of the strong-coupling bound magnetopolaron in quantum rods (QRs) with hydrogenic impurity is studied by means of the Huybrechts-Lee-Low-Pines transformation method and the quantum statistical theory. The expressions for the ground-state energy and the mean number of phonons of the magnetopolaron are derived. Results of the numerical calculations show that the bound state of the magnetopolaron cannot be formed when the value of the aspect ratio of the QR, the dielectric constant ratio, the electron-phonon coupling strength or the temperature parameter is small. The larger the deviation of the value of aspect ratio e' from 1 is, the more it is unfavorable to the stability of the ground state of the magnetopolaron. When the magnetopolaron is in the bound state, the absolute value of its ground-state energy and its mean number of phonons increase with an increase of the dielectric constant ratio and confinement strength of QRs, but decrease with an increase in the cyclotron frequency of the external magnetic field and the temperature. The absolute value of the ground-state energy and the mean number of phonons of the magnetopolaron decrease with decreasing e' when e' < 1, but decrease with increasing e' when e' > 1. They get the maximum value at e'=1.
Extraction of interface state density and resistivity of suspended p-type silicon nanobridges
Jiahong Zhang, Qingquan Liu, Yixian Ge, Fang Gu, Min Li, Xiaoli Mao, Hongxia Cao
J. Semicond.  2013, 34(5): 052002  doi: 10.1088/1674-4926/34/5/052002

The evaluation of the influence of the bending deformation of silicon nanobridges on their electrical properties is crucial for sensing and actuating applications. A combined theory/experimental approach for determining the resistivity and the density of interface states of the bending silicon nanobridges is presented. The suspended p-type silicon nanobridge test structures were fabricated from silicon-on-insulator wafers by using a standard CMOS lithography and anisotropic wet etching release process. After that, we measured the resistance of a set of silicon nanobridges versus their length and width under different bias voltages. In conjunction with a theoretical model, we have finally extracted both the interface state density of and resistivity suspended silicon nanobridges under different bending deformations, and found that the resistivity of silicon nanobridges without bending was 9.45 mΩ·cm and the corresponding interface charge density was around 1.7445×1013 cm-2. The bending deformation due to the bias voltage slightly changed the resistivity of the silicon nanobridge, however, it significantly changed the distribution of interface state charges, which strongly depends on the intensity of the stress induced by bending deformation.

The evaluation of the influence of the bending deformation of silicon nanobridges on their electrical properties is crucial for sensing and actuating applications. A combined theory/experimental approach for determining the resistivity and the density of interface states of the bending silicon nanobridges is presented. The suspended p-type silicon nanobridge test structures were fabricated from silicon-on-insulator wafers by using a standard CMOS lithography and anisotropic wet etching release process. After that, we measured the resistance of a set of silicon nanobridges versus their length and width under different bias voltages. In conjunction with a theoretical model, we have finally extracted both the interface state density of and resistivity suspended silicon nanobridges under different bending deformations, and found that the resistivity of silicon nanobridges without bending was 9.45 mΩ·cm and the corresponding interface charge density was around 1.7445×1013 cm-2. The bending deformation due to the bias voltage slightly changed the resistivity of the silicon nanobridge, however, it significantly changed the distribution of interface state charges, which strongly depends on the intensity of the stress induced by bending deformation.
Photoelectrocatrocatalytic hydrolysis of starch by using sprayed ZnO thin films
R. T. Sapkal, S. S. Shinde, K. Y. Rajpure, C. H. Bhosale
J. Semicond.  2013, 34(5): 053001  doi: 10.1088/1674-4926/34/5/053001

Thin films of zinc oxide have been deposited onto glass/FTO substrates at optimized 400℃ by using a chemical spray pyrolysis technique. Deposited films are characterized for their structural, morphological optical and photocatalytic activity by using XRD, an SEM, a UV-vis spectrophotometer, and a PEC single-cell reactor. Films are polycrystalline and have a hexagonal (wurtzite) crystal structure with c-axis (002) orientation growth perpendicular to the substrate surface. The observed direct band gap is about 3.22 eV for typical films prepared at 400℃. The photocatalytic activity of starch with a ZnO photocatalyst has been studied by using a novel photoelectrocatalytic process.

Thin films of zinc oxide have been deposited onto glass/FTO substrates at optimized 400℃ by using a chemical spray pyrolysis technique. Deposited films are characterized for their structural, morphological optical and photocatalytic activity by using XRD, an SEM, a UV-vis spectrophotometer, and a PEC single-cell reactor. Films are polycrystalline and have a hexagonal (wurtzite) crystal structure with c-axis (002) orientation growth perpendicular to the substrate surface. The observed direct band gap is about 3.22 eV for typical films prepared at 400℃. The photocatalytic activity of starch with a ZnO photocatalyst has been studied by using a novel photoelectrocatalytic process.
SEMICONDUCTOR MATERIALS
Structural and magnetic properties of Yb-implanted GaN
Chunhai Yin, Chao Liu, Dongyan Tao, Yiping Zeng
J. Semicond.  2013, 34(5): 053002  doi: 10.1088/1674-4926/34/5/053002

N-type, p-type and unintentionally-doped GaN were implanted with Yb ions by double energy ion implantation and the samples were annealed at 900℃. The structural and magnetic properties of the samples have been studied by high-resolution X-ray diffraction (HRXRD), Raman scattering and with a superconducting quantum interference device (SQUID). No second phase has been observed and implantation induced defects can not be completely removed by rapid thermal annealing. The annealed samples show magnetic anisotropy and clear ferromagnetic behavior at room temperature. P-, u-and n-GaN:Yb samples show an effective magnetic moment of 1.60, 1.24 and 0.59 μB/Yb, respectively.

N-type, p-type and unintentionally-doped GaN were implanted with Yb ions by double energy ion implantation and the samples were annealed at 900℃. The structural and magnetic properties of the samples have been studied by high-resolution X-ray diffraction (HRXRD), Raman scattering and with a superconducting quantum interference device (SQUID). No second phase has been observed and implantation induced defects can not be completely removed by rapid thermal annealing. The annealed samples show magnetic anisotropy and clear ferromagnetic behavior at room temperature. P-, u-and n-GaN:Yb samples show an effective magnetic moment of 1.60, 1.24 and 0.59 μB/Yb, respectively.
Influence of substrate temperature on the structural and properties of In-doped CdO films prepared by PLD
Biju Zheng, Wen Hu
J. Semicond.  2013, 34(5): 053003  doi: 10.1088/1674-4926/34/5/053003

Transparent indium-doped cadmium oxide (In-CdO) thin films were deposited on quartz glass substrates by pulsed laser deposition (PLD) from an ablating Cd-In metallic target. The effect of substrate temperature on the structural, optical and electrical properties of In-doped CdO thin films were studied in detail. The optical transmittance of In doped CdO films are obviously influenced by the substrate temperature. All films exhibit a transmittance higher than 75% in the visible region. More significantly, In-doping leads to an evident widening of optical band gap from 2.56 to 2.91 eV; and the increase in optical band gap is found to depend on the deposition temperature. It is also seen that the electrical properties of these films strongly depend on the substrate temperature. The In-CdO thin film grown at 300℃ has low resistivity (1.15×10-4 Ω·cm), high carrier concentration (5.35×1020 cm-3), and high mobility (101.43 cm2/(V· s)).

Transparent indium-doped cadmium oxide (In-CdO) thin films were deposited on quartz glass substrates by pulsed laser deposition (PLD) from an ablating Cd-In metallic target. The effect of substrate temperature on the structural, optical and electrical properties of In-doped CdO thin films were studied in detail. The optical transmittance of In doped CdO films are obviously influenced by the substrate temperature. All films exhibit a transmittance higher than 75% in the visible region. More significantly, In-doping leads to an evident widening of optical band gap from 2.56 to 2.91 eV; and the increase in optical band gap is found to depend on the deposition temperature. It is also seen that the electrical properties of these films strongly depend on the substrate temperature. The In-CdO thin film grown at 300℃ has low resistivity (1.15×10-4 Ω·cm), high carrier concentration (5.35×1020 cm-3), and high mobility (101.43 cm2/(V· s)).
The effect of δ-doping and modulation-doping on Si-doped high Al content n-AlxGa1-xN grown by MOCVD
Shaoxin Zhu, Jianchang Yan, Jianping Zeng, Ning Zhang, Zhao Si, Peng Dong, Jinmin Li, Junxi Wang
J. Semicond.  2013, 34(5): 053004  doi: 10.1088/1674-4926/34/5/053004

The effect of periodic delta-doping and modulation-doping on high Al content n-AlxGa1-xN (x=0.55) epilayers grown by MOCVD has been investigated. Measured by XRD, AFM, contactless sheet resistance, and Hall-effect tests, δ-doped and modulation-doped n-AlxGa1-xN have better crystal quality, surface morphology and electrical properties as compared with uniformly-doped n-AlxGa1-xN. These improvements are attributed to the SiNx growth mask induced by δ-doping layers and the dislocation-blocking effect induced by both growth techniques. In addition, due to the broadened doping profile ascribed to enhanced dopant diffusion at high growth temperatures (1150℃) of n-Al0.55Ga0.45N, modulation-doped n-Al0.55Ga0.45N has similar properties as δ-doped n-Al0.55Ga0.45N.

The effect of periodic delta-doping and modulation-doping on high Al content n-AlxGa1-xN (x=0.55) epilayers grown by MOCVD has been investigated. Measured by XRD, AFM, contactless sheet resistance, and Hall-effect tests, δ-doped and modulation-doped n-AlxGa1-xN have better crystal quality, surface morphology and electrical properties as compared with uniformly-doped n-AlxGa1-xN. These improvements are attributed to the SiNx growth mask induced by δ-doping layers and the dislocation-blocking effect induced by both growth techniques. In addition, due to the broadened doping profile ascribed to enhanced dopant diffusion at high growth temperatures (1150℃) of n-Al0.55Ga0.45N, modulation-doped n-Al0.55Ga0.45N has similar properties as δ-doped n-Al0.55Ga0.45N.
ZnO nanoparticles as a luminescent down-shifting layer for photosensitive devices
Yao Zhu, A. Apostoluk, Shibin Liu, S. Daniele, B. Masenelli
J. Semicond.  2013, 34(5): 053005  doi: 10.1088/1674-4926/34/5/053005

The optical properties of ZnO nanoparticles (NPs) fabricated by three different methods were studied by the UV-excited continuous wave photoluminescence in order to estimate their down-shifting (DS) efficiency. Such a luminescent layer modifies the incident solar radiation via emitting wavelengths better matching the spectral response of the underlying photosensitive device (photodiode), thereby increasing its efficiency. Some of the studied ZnO NPs were subsequently deposited on the front side of commercial silicon photodiodes and the external quantum efficiency (EQE) characteristics of the final devices were measured. Through comparison of the photodiode's EQE characteristics before and after the deposition of the ZnO NPs layer, it was concluded that for the photodiode with a low UV sensitivity (about 8%), the ZnO luminescent layer produces a down-shifting effect and the EQE in the UV and blue range improves by 16.6%, while for the photodiodes with a higher initial UV sensitivity (about 50%), the EQE in this range decreases with the ZnO layer thickness, due to the effects competing with DS, like the diminution of the ZnO layer transmittance and an increasing diffusion.

The optical properties of ZnO nanoparticles (NPs) fabricated by three different methods were studied by the UV-excited continuous wave photoluminescence in order to estimate their down-shifting (DS) efficiency. Such a luminescent layer modifies the incident solar radiation via emitting wavelengths better matching the spectral response of the underlying photosensitive device (photodiode), thereby increasing its efficiency. Some of the studied ZnO NPs were subsequently deposited on the front side of commercial silicon photodiodes and the external quantum efficiency (EQE) characteristics of the final devices were measured. Through comparison of the photodiode's EQE characteristics before and after the deposition of the ZnO NPs layer, it was concluded that for the photodiode with a low UV sensitivity (about 8%), the ZnO luminescent layer produces a down-shifting effect and the EQE in the UV and blue range improves by 16.6%, while for the photodiodes with a higher initial UV sensitivity (about 50%), the EQE in this range decreases with the ZnO layer thickness, due to the effects competing with DS, like the diminution of the ZnO layer transmittance and an increasing diffusion.
Preparation of GaN-on-Si based thin-film flip-chip LEDs
Shaohua Zhang, Bo Feng, Qian Sun, Hanmin Zhao
J. Semicond.  2013, 34(5): 053006  doi: 10.1088/1674-4926/34/5/053006

GaN based MQW epitaxial layers were grown on Si (111) substrate by MOCVD using AlN as the buffer layer. High light extraction LEDs were prepared by substrate transferring technology in combination with thin-film and flip-chip design. The blue and white 1.1×1.1 mm2 LED lamps are measured. The optical powers and external quantum efficiency for silicone encapsulated blue lamp are 546 mW, and 50.3% at forward current of 350 mA, while the photometric light output for a white lamp packaged with standard YAG phosphor is 120.1 lm.

GaN based MQW epitaxial layers were grown on Si (111) substrate by MOCVD using AlN as the buffer layer. High light extraction LEDs were prepared by substrate transferring technology in combination with thin-film and flip-chip design. The blue and white 1.1×1.1 mm2 LED lamps are measured. The optical powers and external quantum efficiency for silicone encapsulated blue lamp are 546 mW, and 50.3% at forward current of 350 mA, while the photometric light output for a white lamp packaged with standard YAG phosphor is 120.1 lm.
Thermal analysis of remote phosphor in LED modules
Mingzhi Dong, Jia Wei, Huaiyu Ye, Cadmus Yuan, Kouchi Zhang
J. Semicond.  2013, 34(5): 053007  doi: 10.1088/1674-4926/34/5/053007

Phosphor plays an important role in LED packages by converting the wavelength of light and achieving specific color. The property and degradation of phosphor are strongly affected by the temperature. Some structural factors have been investigated in this paper and their effects are evaluated. Remote phosphor is an effective approach to improve the performance and reliability of LED modules and products. It is a trade-off that the final product design depends on both the thermal performance and the cost.

Phosphor plays an important role in LED packages by converting the wavelength of light and achieving specific color. The property and degradation of phosphor are strongly affected by the temperature. Some structural factors have been investigated in this paper and their effects are evaluated. Remote phosphor is an effective approach to improve the performance and reliability of LED modules and products. It is a trade-off that the final product design depends on both the thermal performance and the cost.
Optical simulation of phosphor layer of white LEDs
Junyuan Liao, Haibo Rao, Wei Wang, Xianlong Wan, Linsong Zhou, Da Zhou, Xuemei Wang, Qiaolin Lei
J. Semicond.  2013, 34(5): 053008  doi: 10.1088/1674-4926/34/5/053008

A Matlab (2009a) program was developed to simulate the photons emitted by the LED chips. The photons' transmission, reflection, and refraction in phosphor layers with different shapes were calculated in this program. The CCT was calculated at different emergent angles with different layer profiles, such as planar layer, hemispherical layer (with different diameters), half ellipsoid layer and other irregular shapes. As a consequence of optimization of angular color uniformity, the trend of configuration of the phosphor layer was discussed and analyzed.

A Matlab (2009a) program was developed to simulate the photons emitted by the LED chips. The photons' transmission, reflection, and refraction in phosphor layers with different shapes were calculated in this program. The CCT was calculated at different emergent angles with different layer profiles, such as planar layer, hemispherical layer (with different diameters), half ellipsoid layer and other irregular shapes. As a consequence of optimization of angular color uniformity, the trend of configuration of the phosphor layer was discussed and analyzed.
SEMICONDUCTOR DEVICES
On-current modeling of short-channel double-gate (DG) MOSFETs with a vertical Gaussian-like doping profile
Sarvesh Dubey, Kumar Tiwari, S. Jit
J. Semicond.  2013, 34(5): 054001  doi: 10.1088/1674-4926/34/5/054001

An analytic drain current model is presented for doped short-channel double-gate MOSFETs with a Gaussian-like doping profile in the vertical direction of the channel. The present model is valid in linear and saturation regions of device operation. The drain current variation with various device parameters has been demonstrated. The model is made more physical by incorporating the channel length modulation effect. Parameters like transconductance and drain conductance that are important in assessing the analog performance of the device have also been formulated. The model results are validated by numerical simulation results obtained by using the commercially available ATLASTM, a two dimensional device simulator from SILVACO.

An analytic drain current model is presented for doped short-channel double-gate MOSFETs with a Gaussian-like doping profile in the vertical direction of the channel. The present model is valid in linear and saturation regions of device operation. The drain current variation with various device parameters has been demonstrated. The model is made more physical by incorporating the channel length modulation effect. Parameters like transconductance and drain conductance that are important in assessing the analog performance of the device have also been formulated. The model results are validated by numerical simulation results obtained by using the commercially available ATLASTM, a two dimensional device simulator from SILVACO.
Multi-LED package design, fabrication and thermal analysis
R. H. Poelma, S. Tarashioon, H. W. van Zeijl, S. Goldbach, J. L. J. Zijl, G. Q. Zhang
J. Semicond.  2013, 34(5): 054002  doi: 10.1088/1674-4926/34/5/054002

An ultra-thin multi-LED package is designed, manufactured and its thermal performance is characterized. The objective of this study is to develop an efficient thermal modelling approach for this system which can be used for optimization of the thermal-performance of future ultra-thin designs. A high-resolution thermal imaging camera and thermocouples were used to measure the temperature distribution of the multi-LED package and the LED-die temperature for different operating powers. Finally, we compare the thermal measurements with the finite element simulation results. It is concluded that the modelling approach can assist in the thermal optimization of future multi-LED package designs.

An ultra-thin multi-LED package is designed, manufactured and its thermal performance is characterized. The objective of this study is to develop an efficient thermal modelling approach for this system which can be used for optimization of the thermal-performance of future ultra-thin designs. A high-resolution thermal imaging camera and thermocouples were used to measure the temperature distribution of the multi-LED package and the LED-die temperature for different operating powers. Finally, we compare the thermal measurements with the finite element simulation results. It is concluded that the modelling approach can assist in the thermal optimization of future multi-LED package designs.
Kirk effect and suppression for 20 V planar active-gap LDMOS
Weidong Nie, Fayou Yi, Zongguang Yu
J. Semicond.  2013, 34(5): 054003  doi: 10.1088/1674-4926/34/5/054003

For 20 V planar active-gap lateral double-diffused MOSFET (LDMOS), the sectional channel is utilized to decrease the electric field in the n-drift region below the poly gate edge in the off-state, compared with the conventional single channel. Then the n-drift concentration can be increased to decrease the Kirk effect, while keeping off-state breakdown voltage Vbd unchanged. Meanwhile the influence of the n-drift concentration and the n-drift length Ldrift (the drain n+ diffusion to gate spacing) which are related to the Kirk effect is discussed. The trade-offs between Rdson·Area, breakdown voltage Vbd and the electrical safe operating area (e-SOA) performance of LDMOS are considered also. Finally the proposed planar active-gap LDMOS devices with varied values of Ldrift are experimentally demonstrated. The experimental results show that the Kirk effect can be greatly suppressed with slight increase in the Rdson·Area parameter.

For 20 V planar active-gap lateral double-diffused MOSFET (LDMOS), the sectional channel is utilized to decrease the electric field in the n-drift region below the poly gate edge in the off-state, compared with the conventional single channel. Then the n-drift concentration can be increased to decrease the Kirk effect, while keeping off-state breakdown voltage Vbd unchanged. Meanwhile the influence of the n-drift concentration and the n-drift length Ldrift (the drain n+ diffusion to gate spacing) which are related to the Kirk effect is discussed. The trade-offs between Rdson·Area, breakdown voltage Vbd and the electrical safe operating area (e-SOA) performance of LDMOS are considered also. Finally the proposed planar active-gap LDMOS devices with varied values of Ldrift are experimentally demonstrated. The experimental results show that the Kirk effect can be greatly suppressed with slight increase in the Rdson·Area parameter.
The effects of current density ratio and reflectivity on the gain, saturation and noise characteristics of a two-section MQW RSOA
Huali Xi, Lirong Huang, Guiying Jiang
J. Semicond.  2013, 34(5): 054004  doi: 10.1088/1674-4926/34/5/054004

A 1.3 μ m two-section multi-quantum well reflective semiconductor optical amplifier is designed and fabricated. The impacts of injection current density ratio and the reflectivity of the reflective facet on gain, saturation and noise characteristics are studied theoretically and experimentally. The results indicate that the gain and saturation power can be easily manipulated by changing the current density ratio; and better gain and noise characteristics can be obtained when the reflectivity is appropriately selected.

A 1.3 μ m two-section multi-quantum well reflective semiconductor optical amplifier is designed and fabricated. The impacts of injection current density ratio and the reflectivity of the reflective facet on gain, saturation and noise characteristics are studied theoretically and experimentally. The results indicate that the gain and saturation power can be easily manipulated by changing the current density ratio; and better gain and noise characteristics can be obtained when the reflectivity is appropriately selected.
Optimization of the emitter region and the metal grid of a concentrator silicon solar cell
Yupeng Xing, Peide Han, Yujie Fan, Shuai Wang, Peng Liang, Zhou Ye, Shaoxu Hu, Xinyi Li, Shishu Lou, Chunhua Zhao, Yanhong Mi
J. Semicond.  2013, 34(5): 054005  doi: 10.1088/1674-4926/34/5/054005

The optimizations of the emitter region and the metal grid of a concentrator silicon solar cell are illustrated. The optimizations are done under 1 sun, 100 suns and 200 suns using the 2D numerical simulation tool TCAD software. The optimum finger spacing and its range decrease with the increase in sheet resistance and concentration ratio. The processes of the diffusion and oxidization in the manufacture flow of the silicon solar cells were simulated to get a series of typical emitter dopant profiles to optimize. The efficiency of the solar cell under 100 suns and 200 suns increased with the decrease in diffusion temperature and the increase in oxidation temperature and time when the diffusion temperature is lower than or equal to 865℃. The effect of sheet resistance of the emitter on series resistance and the conversion efficiency of the solar cell under concentration was discussed.

The optimizations of the emitter region and the metal grid of a concentrator silicon solar cell are illustrated. The optimizations are done under 1 sun, 100 suns and 200 suns using the 2D numerical simulation tool TCAD software. The optimum finger spacing and its range decrease with the increase in sheet resistance and concentration ratio. The processes of the diffusion and oxidization in the manufacture flow of the silicon solar cells were simulated to get a series of typical emitter dopant profiles to optimize. The efficiency of the solar cell under 100 suns and 200 suns increased with the decrease in diffusion temperature and the increase in oxidation temperature and time when the diffusion temperature is lower than or equal to 865℃. The effect of sheet resistance of the emitter on series resistance and the conversion efficiency of the solar cell under concentration was discussed.
A THz InGaAs/InP double heterojunction bipolar transistor with fmax=325 GHz and BVCBO=10.6 V
Wei Cheng, Yuan Wang, Yan Zhao, Haiyan Lu, Hanchao Gao, Naibin Yang
J. Semicond.  2013, 34(5): 054006  doi: 10.1088/1674-4926/34/5/054006

A common-base four finger InGaAs/InP double heterostructure bipolar transistor (DHBT) has been designed and fabricated using triple mesa structure and planarization technology. All processes are on 3-inch wafers. The area of each emitter finger is 1×15 μm2. The maximum oscillation frequency (fmax) is 325 GHz and the breakdown voltage BVCBO is 10.6 V, which are to our knowledge both the highest fmax and BVCBO ever reported for InGaAs/InP DHBTs in China. The high speed InGaAs/InP DHBT with a high breakdown voltage is promising for submillimeter-wave and THz electronics.

A common-base four finger InGaAs/InP double heterostructure bipolar transistor (DHBT) has been designed and fabricated using triple mesa structure and planarization technology. All processes are on 3-inch wafers. The area of each emitter finger is 1×15 μm2. The maximum oscillation frequency (fmax) is 325 GHz and the breakdown voltage BVCBO is 10.6 V, which are to our knowledge both the highest fmax and BVCBO ever reported for InGaAs/InP DHBTs in China. The high speed InGaAs/InP DHBT with a high breakdown voltage is promising for submillimeter-wave and THz electronics.
Field plate engineering for GaN-based Schottky barrier diodes
Yong Lei, Hongbiao Shi, Hai Lu, Dunjun Chen, Rong Zhang, Youdou Zheng
J. Semicond.  2013, 34(5): 054007  doi: 10.1088/1674-4926/34/5/054007

The practical design of GaN-based Schottky barrier diodes (SBDs) incorporating a field plate (FP) structure necessitates an understanding of their working mechanism and optimization criteria. In this work, the influences of the parameters of FPs upon breakdown of the diode are investigated in detail and the design rules of FP structures for GaN-based SBDs are presented for a wide scale of material and device parameters. By comparing three representative dielectric materials (SiO2, Si3N4 and Al2O3) selected for fabricating FPs, it is found that the product of dielectric permittivity and critical field strength of a dielectric material could be used as an index to predict its potential performance for FP applications.

The practical design of GaN-based Schottky barrier diodes (SBDs) incorporating a field plate (FP) structure necessitates an understanding of their working mechanism and optimization criteria. In this work, the influences of the parameters of FPs upon breakdown of the diode are investigated in detail and the design rules of FP structures for GaN-based SBDs are presented for a wide scale of material and device parameters. By comparing three representative dielectric materials (SiO2, Si3N4 and Al2O3) selected for fabricating FPs, it is found that the product of dielectric permittivity and critical field strength of a dielectric material could be used as an index to predict its potential performance for FP applications.
Improvement of carrier distribution in dual wavelength light-emitting diodes
Zhao Si, Tongbo Wei, Ning Zhang, Jun Ma, Junxi Wang, Jinmin Li
J. Semicond.  2013, 34(5): 054008  doi: 10.1088/1674-4926/34/5/054008

The effect of different barriers between green and blue light regions in dual wavelength light emitting diodes was studied. Compared with a traditional sample, electroluminescence and photoluminescence spectra of the newly designed samples showed peak intensity improvements and smaller blue-shifts with increasing injection current level, and the bottom quantum-wells light emitting is enhanced. All these phenomena can be ascribed to reduced barrier thickness and indium doping in the quantum-barrier influencing electric fields and more holes injecting into the bottom QWs.

The effect of different barriers between green and blue light regions in dual wavelength light emitting diodes was studied. Compared with a traditional sample, electroluminescence and photoluminescence spectra of the newly designed samples showed peak intensity improvements and smaller blue-shifts with increasing injection current level, and the bottom quantum-wells light emitting is enhanced. All these phenomena can be ascribed to reduced barrier thickness and indium doping in the quantum-barrier influencing electric fields and more holes injecting into the bottom QWs.
Analysis of incomplete charge transfer effects in a CMOS image sensor
Liqiang Han, Suying Yao, Jiangtao Xu, Chao Xu, Zhiyuan Gao
J. Semicond.  2013, 34(5): 054009  doi: 10.1088/1674-4926/34/5/054009

A method to judge complete charger transfer is proposed for a four-transistor CMOS image sensor with a large pixel size. Based on the emission current theory, a qualitative photoresponse model is established to the preliminary prediction. Further analysis of noise for incomplete charge transfer predicts the noise variation. The test pixels were fabricated in a specialized 0.18 μ m CMOS image sensor process and two different processes of buried N layer implantation are compared. The trend prediction corresponds with the test results, especially as it can distinguish an unobvious incomplete charge transfer. The method helps us judge whether the charge transfer time satisfies the requirements of the readout circuit for the given process especially for pixels of a large size.

A method to judge complete charger transfer is proposed for a four-transistor CMOS image sensor with a large pixel size. Based on the emission current theory, a qualitative photoresponse model is established to the preliminary prediction. Further analysis of noise for incomplete charge transfer predicts the noise variation. The test pixels were fabricated in a specialized 0.18 μ m CMOS image sensor process and two different processes of buried N layer implantation are compared. The trend prediction corresponds with the test results, especially as it can distinguish an unobvious incomplete charge transfer. The method helps us judge whether the charge transfer time satisfies the requirements of the readout circuit for the given process especially for pixels of a large size.
Self-adaptive phosphor coating technology for wafer-level scale chip packaging
Linsong Zhou, Haibo Rao, Wei Wang, Xianlong Wan, Junyuan Liao, Xuemei Wang, Da Zhou, Qiaolin Lei
J. Semicond.  2013, 34(5): 054010  doi: 10.1088/1674-4926/34/5/054010

A new self-adaptive phosphor coating technology has been successfully developed, which adopted a slurry method combined with a self-exposure process. A phosphor suspension in the water-soluble photoresist was applied and exposed to LED blue light itself and developed to form a conformal phosphor coating with self-adaptability to the angular distribution of intensity of blue light and better-performing spatial color uniformity. The self-adaptive phosphor coating technology had been successfully adopted in the wafer surface to realize a wafer-level scale phosphor conformal coating. The first-stage experiments show satisfying results and give an adequate demonstration of the flexibility of self-adaptive coating technology on application of WLSCP.

A new self-adaptive phosphor coating technology has been successfully developed, which adopted a slurry method combined with a self-exposure process. A phosphor suspension in the water-soluble photoresist was applied and exposed to LED blue light itself and developed to form a conformal phosphor coating with self-adaptability to the angular distribution of intensity of blue light and better-performing spatial color uniformity. The self-adaptive phosphor coating technology had been successfully adopted in the wafer surface to realize a wafer-level scale phosphor conformal coating. The first-stage experiments show satisfying results and give an adequate demonstration of the flexibility of self-adaptive coating technology on application of WLSCP.
SEMICONDUCTOR INTEGRATED CIRCUITS
A novel COB structure with integrated multifunction
Zhiguo Xie, Cheng Li, Binhai Yu, Yaohao Wang
J. Semicond.  2013, 34(5): 055001  doi: 10.1088/1674-4926/34/5/055001

A novel COB (chip-on-board) structure with integrated multifunction is presented. The structure is prepared by laminating copper plate with FR4 board and then coating with a silver layer to offer high reflectivity and high conductivity. In comparison with MCPCB (aluminum) and ceramics (Al2O3) board, the substrate brings about 10% higher light extracting efficiency than aluminum board and 5% higher flux maintenance ratio than ceramics (Al2O3) board at 3000 h. With integrated multifunction, through an IC component driving high voltage serial LED chips, the COB can be directly connected to AC 110 V or 220 V power supply in lighting application.

A novel COB (chip-on-board) structure with integrated multifunction is presented. The structure is prepared by laminating copper plate with FR4 board and then coating with a silver layer to offer high reflectivity and high conductivity. In comparison with MCPCB (aluminum) and ceramics (Al2O3) board, the substrate brings about 10% higher light extracting efficiency than aluminum board and 5% higher flux maintenance ratio than ceramics (Al2O3) board at 3000 h. With integrated multifunction, through an IC component driving high voltage serial LED chips, the COB can be directly connected to AC 110 V or 220 V power supply in lighting application.
A low-power portable ECG sensor interface with dry electrodes
Xiaofei Pu, Lei Wan, Hui Zhang, Yajie Qin, Zhiliang Hong
J. Semicond.  2013, 34(5): 055002  doi: 10.1088/1674-4926/34/5/055002

This paper describes a low-power portable sensor interface dedicated to sensing and processing electrocardiogram (ECG) signals. Dry electrodes were employed in this ECG sensor, which eliminates the need of conductive gel and avoids complicated and mandatory skin preparation before electrode attachment. This ECG sensor system consists of two ICs, an analog front-end (AFE) and a successive approximation register analog-to-digital converter (SAR ADC) containing a relaxation oscillator. This proposed design was fabricated in a 0.18 μm 1P6M standard CMOS process. The AFE for extracting the biopotential signals is essential in this ECG sensor. In measurements, the AFE obtains a mid-band gain of 45 dB, a bandwidth from 0.6 to 160 Hz, and a total input referred noise of 2.8 μV rms while consuming 1 μW from the 1.8 V supply. The noise efficiency factor (NEF) of our design is 3.4. After conditioning, the amplified ECG signal is digitized by a 12-bit SAR ADC with 61.8 dB SNDR and 220 fJ/conversion-step. Finally, a complete ECG sensor interface with three dry copper electrodes is demonstrated in real-word setting, showing successful recordings of a capture ECG waveform.

This paper describes a low-power portable sensor interface dedicated to sensing and processing electrocardiogram (ECG) signals. Dry electrodes were employed in this ECG sensor, which eliminates the need of conductive gel and avoids complicated and mandatory skin preparation before electrode attachment. This ECG sensor system consists of two ICs, an analog front-end (AFE) and a successive approximation register analog-to-digital converter (SAR ADC) containing a relaxation oscillator. This proposed design was fabricated in a 0.18 μm 1P6M standard CMOS process. The AFE for extracting the biopotential signals is essential in this ECG sensor. In measurements, the AFE obtains a mid-band gain of 45 dB, a bandwidth from 0.6 to 160 Hz, and a total input referred noise of 2.8 μV rms while consuming 1 μW from the 1.8 V supply. The noise efficiency factor (NEF) of our design is 3.4. After conditioning, the amplified ECG signal is digitized by a 12-bit SAR ADC with 61.8 dB SNDR and 220 fJ/conversion-step. Finally, a complete ECG sensor interface with three dry copper electrodes is demonstrated in real-word setting, showing successful recordings of a capture ECG waveform.
Design of basic digital circuit blocks based on an OFET device charge model
Shu Shen
J. Semicond.  2013, 34(5): 055003  doi: 10.1088/1674-4926/34/5/055003

An OFET charge model, as well as its parameter extraction method are presented. The fitting results are also discussed and different OFET model characters are compared. Some basic OFET based digital circuit blocks, including the inverter, NAND, and ring oscillator are also developed, which would be considered to be helpful to the design of relevant applications.

An OFET charge model, as well as its parameter extraction method are presented. The fitting results are also discussed and different OFET model characters are compared. Some basic OFET based digital circuit blocks, including the inverter, NAND, and ring oscillator are also developed, which would be considered to be helpful to the design of relevant applications.
A 0.5 V divider-by-2 design with optimization methods for wireless sensor networks
Lidan Wang, Zhiqun Li
J. Semicond.  2013, 34(5): 055004  doi: 10.1088/1674-4926/34/5/055004

A 0.5 V static master-slave D flip-flop (DFF) divider-by-2 is implemented with a 0.13 μm 1P8M RF-mixed signal CMOS process. Low-threshold transistors in a deep-N well with forward-body bias technology are used in the circuit. Each of the D-latch with source coupled logic consists of sensing and latching circuits. To increase the maximum operating frequency and decrease power consumption, the latching current is one half of the sensing current. The circuit optimization methods are described in this paper. The measured maximum operating frequency is 6.5 GHz and the minimum input singled-signal amplitude is 0.15 V.

A 0.5 V static master-slave D flip-flop (DFF) divider-by-2 is implemented with a 0.13 μm 1P8M RF-mixed signal CMOS process. Low-threshold transistors in a deep-N well with forward-body bias technology are used in the circuit. Each of the D-latch with source coupled logic consists of sensing and latching circuits. To increase the maximum operating frequency and decrease power consumption, the latching current is one half of the sensing current. The circuit optimization methods are described in this paper. The measured maximum operating frequency is 6.5 GHz and the minimum input singled-signal amplitude is 0.15 V.
A new AC driving circuit for a top emission AMOLED
Yongwen Zhang, Wenbin Chen, Haohan Liu
J. Semicond.  2013, 34(5): 055005  doi: 10.1088/1674-4926/34/5/055005

A new voltage programmed pixel circuit with top emission design for active-matrix organic light-emitting diode (AMOLED) displays is presented and verified by HSPICE simulations. The proposed pixel circuit consists of five poly-Si TFTs, and can effectively compensate for the threshold voltage variation of the driving TFT. Meanwhile, the proposed pixel circuit offers an AC driving mode for the OLED by the two adjacent pulse voltage sources, which can suppress the degradation of the OLED. Moreover, a high contrast ratio can be achieved by the proposed pixel circuit since the OLED does not emit any light except for the emission period.

A new voltage programmed pixel circuit with top emission design for active-matrix organic light-emitting diode (AMOLED) displays is presented and verified by HSPICE simulations. The proposed pixel circuit consists of five poly-Si TFTs, and can effectively compensate for the threshold voltage variation of the driving TFT. Meanwhile, the proposed pixel circuit offers an AC driving mode for the OLED by the two adjacent pulse voltage sources, which can suppress the degradation of the OLED. Moreover, a high contrast ratio can be achieved by the proposed pixel circuit since the OLED does not emit any light except for the emission period.
SEMICONDUCTOR TECHNOLOGY
Reactive ion etching of Si2Sb2Te5 in CF4/Ar plasma for a nonvolatile phase-change memory device
Juntao Li, Bo Liu, Zhitang Song, Dongning Yao, Gaoming Feng, Aodong He, Cheng Peng, Songlin Feng
J. Semicond.  2013, 34(5): 056001  doi: 10.1088/1674-4926/34/5/056001

Phase change random access memory (PCRAM) is one of the best candidates for next generation non-volatile memory, and phase change Si2Sb2Te5 material is expected to be a promising material for PCRAM. In the fabrication of phase change random access memories, the etching process is a critical step. In this paper, the etching characteristics of Si2Sb2Te5 films were studied with a CF4/Ar gas mixture using a reactive ion etching system. We observed a monotonic decrease in etch rate with decreasing CF4 concentration, meanwhile, Ar concentration went up and smoother etched surfaces were obtained. It proves that CF4 determines the etch rate while Ar plays an important role in defining the smoothness of the etched surface and sidewall edge acuity. Compared with Ge2Sb2Te5, it is found that Si2Sb2Te5 has a greater etch rate. Etching characteristics of Si2Sb2Te5 as a function of power and pressure were also studied. The smoothest surfaces and most vertical sidewalls were achieved using a CF4/Ar gas mixture ratio of 10/40, a background pressure of 40 mTorr, and power of 200 W.

Phase change random access memory (PCRAM) is one of the best candidates for next generation non-volatile memory, and phase change Si2Sb2Te5 material is expected to be a promising material for PCRAM. In the fabrication of phase change random access memories, the etching process is a critical step. In this paper, the etching characteristics of Si2Sb2Te5 films were studied with a CF4/Ar gas mixture using a reactive ion etching system. We observed a monotonic decrease in etch rate with decreasing CF4 concentration, meanwhile, Ar concentration went up and smoother etched surfaces were obtained. It proves that CF4 determines the etch rate while Ar plays an important role in defining the smoothness of the etched surface and sidewall edge acuity. Compared with Ge2Sb2Te5, it is found that Si2Sb2Te5 has a greater etch rate. Etching characteristics of Si2Sb2Te5 as a function of power and pressure were also studied. The smoothest surfaces and most vertical sidewalls were achieved using a CF4/Ar gas mixture ratio of 10/40, a background pressure of 40 mTorr, and power of 200 W.