J. Semicond. > Volume 31 > Issue 9 > Article Number: 095009

A low power automatic gain control loop for a receiver

Li Guofeng , Geng Zhiqing and Wu Nanjian

+ Author Affilications + Find other works by these authors

PDF

Abstract: This paper proposes a new structure to lower the power consumption of a variable gain amplifier (VGA) and keep the linearity of the VGA unchanged. The structure is used in a high rate amplitude-shift keying (ASK) based IF-stage. It includes an automatic gain control (AGC) loop and ASK demodulator. The AGC mainly consists of six-stage VGAs. The IF-stage is realized in 0.18 μm CMOS technology. The measurement results show that the power consumption of the whole system is very low. The system consumes 730 μA while operating at 1.8 V. The minimum ASK signal the system could detect is 0.7 mV (peak to peak amplitude).

Key words: low powerlinearityvariable gain amplifierautomatic gain control loopamplitude-shift keying

[1]

Yun Tinghua, Tang Shoulong, Shi Longxing. A Highly Linear CMOS IF Variable Gain Amplifier withExponential Gain Control. J. Semicond., 2006, 27(9): 1666.

[2]

Wang Ziqiang, Chi Baoyong, Wang Zhihua. A CMOS Wideband Variable Gain Amplifier. J. Semicond., 2005, 26(12): 2401.

[3]

Guo Feng, Li Zhiqun, Chen Dongdong, Li Haisong, Wang Zhigong. Design of a Wideband CMOS Variable Gain Amplifier. J. Semicond., 2007, 28(12): 1967.

[4]

Zheng Jiajie, Mo Taishan, Ma Chengyan, Yin Ming. A novel reconfigurable variable gain amplifier for a multi-mode multi-band receiver. J. Semicond., 2010, 31(7): 075011. doi: 10.1088/1674-4926/31/7/075011

[5]

Dong Qiao, Geng Li, Shao Zhibiao. A Low-Voltage,Low-Power CMOS High Dynamic Range dB-Linear VGA for Super Heterodyne Receivers. J. Semicond., 2007, 28(11): 1690.

[6]

Nan Lin, Fei Fang, Zhiliang Hong, Hao Fang. A 3.8 GHz programmable gain amplifier with a 0.1 dB gain step. J. Semicond., 2014, 35(3): 035004. doi: 10.1088/1674-4926/35/3/035004

[7]

Chengying Chen, Hainan Liu, Yong Hei, Jun Fan, Xiaoyu Hu. A low-power high-performance configurable auto-gain control loop for a digital hearing aid SoC. J. Semicond., 2013, 34(10): 105011. doi: 10.1088/1674-4926/34/10/105011

[8]

Wenbo Wang, Luhong Mao, Xindong Xiao, Shilin Zhang, Sheng Xie. A differential automatic gain control circuit with two-stage-10 to 50 dB tuning range VGAs. J. Semicond., 2013, 34(2): 025008. doi: 10.1088/1674-4926/34/2/025008

[9]

Li Zhenrong, Zhuang Yiqi, Li Bing, Jin Gang, Jin Zhao. A 2.4 GHz high-linearity low-phase-noise CMOS LC-VCO based on capacitance compensation. J. Semicond., 2010, 31(7): 075005. doi: 10.1088/1674-4926/31/7/075005

[10]

Binbin Wei, Jinguang Jiang. A low power high gain gain-controlled LNA + mixer for GNSS receivers. J. Semicond., 2013, 34(11): 115002. doi: 10.1088/1674-4926/34/11/115002

[11]

Zhou Jiaye, Tan Xi, Wang Junyu, Tang Zhangwen, Min Hao. A 60-dB linear VGA with novel exponential gain approximation. J. Semicond., 2009, 30(6): 065006. doi: 10.1088/1674-4926/30/6/065006

[12]

Zhi Chuande, Yang Huazhong. Analysis of Envelope Elimination and Restoration RF Power Amplifier. J. Semicond., 2007, 28(4): 582.

[13]

Ma Desheng, Shi Yin, Dai Fa Foster. A Wide-Band Low Noise Amplifier for Terrestrial and Cable Receptions. J. Semicond., 2006, 27(6): 970.

[14]

Liao Youchun, , Tang Zhangwen. A Wide-Band CMOS Low-Noise Amplifier for TV Tuner Applications. J. Semicond., 2006, 27(11): 2029.

[15]

Kai Tang, Qiao Meng, Zhigong Wang, Yi Zhang, Kuai Yin, Ting Guo. A low-power 20 GSps track-and-hold amplifier in 0.18 μm SiGe BiCMOS technology. J. Semicond., 2013, 34(9): 095002. doi: 10.1088/1674-4926/34/9/095002

[16]

Wei Zhu, Baoyong Chi, Lixue Kuang, Wen Jia, Zhihua Wang. An inductorless CMOS programmable-gain amplifier with a > 3 GHz bandwidth for 60 GHz wireless transceivers. J. Semicond., 2014, 35(10): 105001. doi: 10.1088/1674-4926/35/10/105001

[17]

Zhixiong Ren, Kefeng Zhang, Lanqi Liu, Cong Li, Xiaofei Chen, Dongsheng Liu, Zhenglin Liu, Xuecheng Zou. On-chip power-combining techniques for watt-level linear power amplifiers in 0.18 μm CMOS. J. Semicond., 2015, 36(9): 095002. doi: 10.1088/1674-4926/36/9/095002

[18]

Songting Li, Jiancheng Li, Xiaochen Gu, Hongyi Wang, Zhaowen Zhuang. A high linearity downconverter for digital broadcasting system. J. Semicond., 2014, 35(12): 125010. doi: 10.1088/1674-4926/35/12/125010

[19]

Pengjun Wang, Keji Zhou, Huihong Zhang, Daohui Gong. Design of replica bit line control circuit to optimize power for SRAM. J. Semicond., 2016, 37(12): 125002. doi: 10.1088/1674-4926/37/12/125002

[20]

Charu Rana, Dinesh Prasad, Neelofar Afzal. Low voltage floating gate MOSFET based current differencing transconductance amplifier and its applications. J. Semicond., 2018, 39(9): 094002. doi: 10.1088/1674-4926/39/9/094002

Search

Advanced Search >>

GET CITATION

Li G F, Geng Z Q, Wu N J. A low power automatic gain control loop for a receiver[J]. J. Semicond., 2010, 31(9): 095009. doi: 10.1088/1674-4926/31/9/095009.

Export: BibTex EndNote

Article Metrics

Article views: 1837 Times PDF downloads: 2624 Times Cited by: 0 Times

History

Manuscript received: 18 August 2015 Manuscript revised: Online: Published: 01 September 2010

Email This Article

User name:
Email:*请输入正确邮箱
Code:*验证码错误