J. Semicond. > Volume 37 > Issue 5 > Article Number: 054007

Measurement of charge transfer potential barrier in pinned photodiode CMOSimage sensors

Chen Cao , Bing Zhang , Junfeng Wang and Longsheng Wu

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Abstract: The charge transfer potential barrier (CTPB) formed beneath the transfer gate causes a noticeable image lag issue in pinned photodiode (PPD) CMOS image sensors (CIS), and is difficult to measure straightforwardly since it is embedded inside the device. From an understanding of the CTPB formation mechanism, we report on an alternative method to feasibly measure the CTPB height by performing a linear extrapolation coupled with a horizontal left-shift on the sensor photoresponse curve under the steady-state illumination. The theoretical study was performed in detail on the principle of the proposed method. Application of the measurements on a prototype PPD-CIS chip with an array of 160 × 160 pixels is demonstrated. Such a method intends to shine new light on the guidance for the lag-free and high-speed sensors optimization based on PPD devices.

Key words: CMOS image sensors (CIS)pinned photodiode (PPD)charge transfer potential barrier (CTPB)photoresponse curve

Abstract: The charge transfer potential barrier (CTPB) formed beneath the transfer gate causes a noticeable image lag issue in pinned photodiode (PPD) CMOS image sensors (CIS), and is difficult to measure straightforwardly since it is embedded inside the device. From an understanding of the CTPB formation mechanism, we report on an alternative method to feasibly measure the CTPB height by performing a linear extrapolation coupled with a horizontal left-shift on the sensor photoresponse curve under the steady-state illumination. The theoretical study was performed in detail on the principle of the proposed method. Application of the measurements on a prototype PPD-CIS chip with an array of 160 × 160 pixels is demonstrated. Such a method intends to shine new light on the guidance for the lag-free and high-speed sensors optimization based on PPD devices.

Key words: CMOS image sensors (CIS)pinned photodiode (PPD)charge transfer potential barrier (CTPB)photoresponse curve



References:

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Han Liqiang, Yao Suying, Xu Jiangtao. Analysis of incomplete charge transfer effects in a CMOS image sensor[J]. Journal of Semiconductors, 2013, 34(5): 054009.

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Li Yiqiang, Li Binqiao, Xu Jiangtao. Charge transfer efficiency improvement of a 4-T pixel by the optimization of electrical potential distribution under the transfer gate[J]. Journal of Semiconductors, 2012, 33(12): 124004.

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Cao Chen, Zhang Bing, Wu Longsheng. A quantum efficiency analytical model for complementary-metal-oxide-semiconductor image pixels with a pinned photodiode structure[J]. Chinese Physics B, 2014, 23(12): 124215.

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Cao C, Shen B, Zhang B. An Improved model for the full well capacity in pinned photodiode CMOS image sensors[J]. IEEE Journal of the Electron Devices Society, 2015, 3(4): 306.

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Cao Chen, Zhang Bing, Wu Longsheng. Pinch-off voltage modeling for CMOS image pixels with a pinned photodiode structure[J]. Journal of Semiconductors, 2014, 35(7): 074012.

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Cao Chen, Zhang Bing, Li Xin. Photoelectric characteristics of an inverse U-shape buried doping design for crosstalk suppression in pinned photodiodes[J]. Journal of Semiconductors, 2014, 35(11): 114009.

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Bonjour L, Blanc N, Kayal M. Experimental analysis of lag sources in pinned photodiodes[J]. IEEE Electron Device Lett, 2012, 33(12): 1735.

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Goiffon V, Estribeau M, Cervantes P. Influence of transfer gate design and bias on the radiation hardness of pinned photodiode CMOS image sensors[J]. IEEE Trans Nucl Sci, 2014, 61(6): 3290.

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Chao C Y, Chen Y, Chou K. Extraction and estimation of pinned photodiode capacitance in CMOS image sensors[J]. IEEE Journal of the Electron Devices Society, 2014, 2(4): 59.

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Goiffon V, Estribeau M, Michelot J. Pixel level characterization of pinned photodiode and transfer gate physical parameters in CMOS image sensors[J]. IEEE Journal of the Electron Devices Society, 2014, 2(4): 65.

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Park S H, Bok J D, Kwon H M. Decrease of dark current by reducing transfer transistor induced partition noise with localized channel implantation[J]. IEEE Electron Device Lett, 2010, 31(11): 1278.

[1]

Shoushun C, Boussaid F, Bermak A. Robust intermediate readout for deep submicron technology CMOS image sensors[J]. IEEE Sensors Journal, 2008, 8(3): 286.

[2]

Han Liqiang, Yao Suying, Xu Jiangtao. Analysis of incomplete charge transfer effects in a CMOS image sensor[J]. Journal of Semiconductors, 2013, 34(5): 054009.

[3]

Li Yiqiang, Li Binqiao, Xu Jiangtao. Charge transfer efficiency improvement of a 4-T pixel by the optimization of electrical potential distribution under the transfer gate[J]. Journal of Semiconductors, 2012, 33(12): 124004.

[4]

Cao Chen, Zhang Bing, Wu Longsheng. A quantum efficiency analytical model for complementary-metal-oxide-semiconductor image pixels with a pinned photodiode structure[J]. Chinese Physics B, 2014, 23(12): 124215.

[5]

Cao C, Shen B, Zhang B. An Improved model for the full well capacity in pinned photodiode CMOS image sensors[J]. IEEE Journal of the Electron Devices Society, 2015, 3(4): 306.

[6]

Cao Chen, Zhang Bing, Wu Longsheng. Pinch-off voltage modeling for CMOS image pixels with a pinned photodiode structure[J]. Journal of Semiconductors, 2014, 35(7): 074012.

[7]

Cao Chen, Zhang Bing, Li Xin. Photoelectric characteristics of an inverse U-shape buried doping design for crosstalk suppression in pinned photodiodes[J]. Journal of Semiconductors, 2014, 35(11): 114009.

[8]

Bonjour L, Blanc N, Kayal M. Experimental analysis of lag sources in pinned photodiodes[J]. IEEE Electron Device Lett, 2012, 33(12): 1735.

[9]

Goiffon V, Estribeau M, Cervantes P. Influence of transfer gate design and bias on the radiation hardness of pinned photodiode CMOS image sensors[J]. IEEE Trans Nucl Sci, 2014, 61(6): 3290.

[10]

Inoue I, Tanaka N, Yamashita H. Low-leakage-current and low-operating-voltage buried photodiode for a CMOS imager[J]. IEEE Trans Electron Devices, 2003, 50(1): 43.

[11]

Gao Z, Yao S, Xu J. Lag free transfer transistor in CMOS image sensor pixel with a non-uniform doped gate[J]. IEEE International Conference of Electron Devices and Solid-State Circuits, 2011: 1.

[12]

Yu Junting, Li Binqiao, Yu Pingping. Two dimensional pixel image lag simulation and optimization in a 4-T CMOS image sensor[J]. Journal of Semiconductors, 2010, 31(9): 094011.

[13]

Fossum E R, Hondongwa D B. A review of pinned photodiode for CCD and CMOS image sensors[J]. IEEE Journal of the Electron Devices Society, 2014, 2(3): 33.

[14]

Yang Y N, Coon D D, Shepard P F. Thermionic emission in silicon at temperatures below 30 K[J]. Appl Phys Lett, 1984, 45: 752.

[15]

Irene E A, Lewis E A. Thermionic emission model for the initial regime of silicon oxidation[J]. Appl Phys Lett, 1987, 51: 767.

[16]

Chao C Y, Chen Y, Chou K. Extraction and estimation of pinned photodiode capacitance in CMOS image sensors[J]. IEEE Journal of the Electron Devices Society, 2014, 2(4): 59.

[17]

Goiffon V, Estribeau M, Michelot J. Pixel level characterization of pinned photodiode and transfer gate physical parameters in CMOS image sensors[J]. IEEE Journal of the Electron Devices Society, 2014, 2(4): 65.

[18]

Park S H, Bok J D, Kwon H M. Decrease of dark current by reducing transfer transistor induced partition noise with localized channel implantation[J]. IEEE Electron Device Lett, 2010, 31(11): 1278.

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C Cao, B Zhang, J F Wang, L S Wu. Measurement of charge transfer potential barrier in pinned photodiode CMOSimage sensors[J]. J. Semicond., 2016, 37(5): 054007. doi: 10.1088/1674-4926/37/5/054007.

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Manuscript received: 11 September 2015 Manuscript revised: Online: Published: 01 May 2016

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