SEMICONDUCTOR INTEGRATED CIRCUITS

An 8–18 GHz power amplifier with novel gain fluctuation compensation technique in 65 nm CMOS

Jie Gong, Wei Li, Jintao Hu, Jiao Ye and Tao Wang

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 Corresponding author: Wei Li, Email: w-li@fudan.edu.cn

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Abstract: A wideband CMOS power amplifier with high gain and excellent gain flatness for X–Ku-band radar phased array is proposed in this paper. Excellent gain flatness is achieved with transformer based matching networks (TMNs), in which the gain fluctuation of an inter-stage matching network can be compensated by the proposed design methods. The circuit is fabricated in the TSMC 65 nm RF CMOS process. The proposed technique is verified by the measurement results, which show that the wideband PA achieves gain of 21–22.5 dB with only ±0.75 dB gain fluctuation and 13–14.6 dBm flat output power between 7.5 and 15.5 GHz, and a little more ripple in the rest of the X–Ku band due to the inaccuracy of passive modelling at high frequency. The circuit delivers saturated and 1 dB-compressed output power of 14.6 and 11.3 dBm respectively at 13 GHz, for a maximal power-added efficiency (PAE) of 23%.

Key words: CMOSwideband power amplifierX–Ku-bandgain flatness



[1]
Chen J H, Helmi S R, Azadegan R, et al. A broadband stacked power amplifier in 45 nm CMOS SOI technology. IEEE J Solid-State Circuits, 2013, 48(11): 2775 doi: 10.1109/JSSC.2013.2276135
[2]
Huang P C, Lin K Y, Wang H. A 4–17 GHz Darlington cascode broadband medium power amplifier in 0.18 μm CMOS technology. IEEE Microwave Wire Compon Lett, 2010, 20(1): 43 doi: 10.1109/LMWC.2009.2035964
[3]
Bassi M, Zhao J L, Svelto F, et al. A 40–67 GHz power amplifier with 13 dBm Psat and 16% PAE in 28 nm CMOS LP. IEEE J Solid-State Circuits, 2015, 50(7): 1618 doi: 10.1109/JSSC.2015.2409295
[4]
Jia H K, Chi B Y, Yue C P, et al. A 32.9% PAE, 15.3 dBm, 21.6–41.6 GHz power amplifier in 65 nm CMOS using coupled resonators. Asian Solid-State Circuits Conference, 2016: 354
[5]
Chen B, J J G, Zheng Y J, et al. A 13.5–19 GHz 20.6 dB gain CMOS power amplifier for FMCW radar application. IEEE Microwave Wire Comp Lett, 2017, 27(4): 377 doi: 10.1109/LMWC.2017.2679047
[6]
Ku B H, Baek S H, Hong S, et al. A wideband transformed coupled CMOS power amplifier for X-band multifunction chips. IEEE Trans Microw Theory Tech, 2011, 59(6): 1599 doi: 10.1109/TMTT.2011.2131676
[7]
Wang H, Sideris C, Hajimiri A. A 5.2-to-13 GHz class-AB CMOS power amplifier with a 25.2 dBm peak output power at 21.6% PAE. ISSCC Dig Tech Pap, 2010: 44
[8]
Vigilante M, Raynaert P. A 29–57 GHz AM-PM compensated class-AB power amplifier for 5G phased arrays in 0.9 V 28 nm bulk CMOS. Radio Frequency Integrated Circuits Symposium (RFIC), 2017: 116
[9]
Larie A, Kerhervé E, Martineau B, et al. A wideband 65 nm CMOS transformer-coupled power amplifier for WiGig applications. European Microwave Integrated Circuit Conference, 2014: 41
[10]
Chen Y F, Quan J H, Hu L L. A 6–18 GHz broadband power amplifier MMIC with excellent efficiency. J Semicond, 2014, 35(1): 015007 doi: 10.1088/1674-4926/35/1/015007
[11]
Park S, Jeon S. Wideband harmonic-tuned CMOS power amplifier with 19.5 dBm output power and 22.6% PAE over entire X-band. Electron Lett, 2015, 52(9): 603
[12]
Li C H, Kuo C N, Kuo M C, et al. A 1.2 V 5.2 mW 20–30 GHz receiver front-end in 0.18 μm CMOS. IEEE Trans. Microw Theory Tech, 2012, 60(11): 3502 doi: 10.1109/TMTT.2012.2216285
[13]
Shakib S, Park H, Dunworth J, et al. A highly efficient and linear power amplifier for 28-GHz 5G phased array radios in 28-nm CMOS. IEEE J Solid-State Circuits, 2016, 51(12): 3020 doi: 10.1109/JSSC.2016.2606584
[14]
Kulkarni S, Raynaert P. A push-pull mm-wave power amplifier with 0.8°AM-PM distortion in 40 nm CMOS. ISSCC, 2014: 252
[15]
Zhao D X, Reaynaert P. A 60 GHz dual-mode class AB power amplifier in 45 nm CMOS. IEEE J Solid-State Circuits, 2013, 48(10): 2775
[16]
Park B, Jin S, Kim B, et al. Highly linear mm-wave CMOS power amplifier. IEEE Trans Microw Theory Tech, 2016, 64(12): 4535 doi: 10.1109/TMTT.2016.2623706
Fig. 1.  Transformer based matching network.

Fig. 2.  Simplified inter-stage matching network.

Fig. 3.  (Color online) Normalized passive gain versus k when Q of secondary side is high (> 10).

Fig. 4.  (Color online) Normalized passive gain versus k when Q equals to 2.

Fig. 5.  (Color online) Normalized passive gain of Method 1 (Q = 1.6) and Method 2 (Q = 0.8) @ k is fixed at 0.75.

Fig. 6.  The proposed wideband X–Ku-band PA.

Fig. 7.  Output matching network.

Fig. 8.  Inter-stage matching network.

Fig. 9.  (Color online) The transformers of (a) output matching network and (b) inter-stage matching network.

Fig. 10.  Normalized passive gain of (a) output matching network, (b) inter-stage matching network, and (c) input matching network. (d) The simulation gain of wideband PA.

Fig. 12.  (Color online) The simulated and measured S-parameters of the wideband PA.

Fig. 11.  (Color online) Chip photograph of the wideband PA.

Fig. 13.  (Color online) Measured gain, POUT, PAE against input power at 13 GHz.

Fig. 14.  (Color online) Measured large signal CW performance versus frequency.

Table 1.   Performance comparison of the wideband power amplifier with previously reported literatures.

Parameter This work JSSCC15[3] ASSCC16[4] MWCL17[5] MTT11[6]
CMOS Tech (nm) 65 28 65 65 180
Supply (V) 1.1 1 1 1.2 3.6
fc (GHz) 13 53 32 15 9.5
Frac. BW (%) 77 51 63 34 52
Gain (dB) 21.2 13 20.8 20.6 25.3
Ripple (dB) 1.5 3 4 3 3
P1 dB (dBm) 11.3 12 12.9 11.6 20.2
PSAT (dBm) 14.6 13.3 15.3 13.9 21.5
PAEMAX (%) 23 16 32 20 20.3
Area (mm2) 0.2 0.066 0.11 0.586* 0.63
*with PAD
DownLoad: CSV
[1]
Chen J H, Helmi S R, Azadegan R, et al. A broadband stacked power amplifier in 45 nm CMOS SOI technology. IEEE J Solid-State Circuits, 2013, 48(11): 2775 doi: 10.1109/JSSC.2013.2276135
[2]
Huang P C, Lin K Y, Wang H. A 4–17 GHz Darlington cascode broadband medium power amplifier in 0.18 μm CMOS technology. IEEE Microwave Wire Compon Lett, 2010, 20(1): 43 doi: 10.1109/LMWC.2009.2035964
[3]
Bassi M, Zhao J L, Svelto F, et al. A 40–67 GHz power amplifier with 13 dBm Psat and 16% PAE in 28 nm CMOS LP. IEEE J Solid-State Circuits, 2015, 50(7): 1618 doi: 10.1109/JSSC.2015.2409295
[4]
Jia H K, Chi B Y, Yue C P, et al. A 32.9% PAE, 15.3 dBm, 21.6–41.6 GHz power amplifier in 65 nm CMOS using coupled resonators. Asian Solid-State Circuits Conference, 2016: 354
[5]
Chen B, J J G, Zheng Y J, et al. A 13.5–19 GHz 20.6 dB gain CMOS power amplifier for FMCW radar application. IEEE Microwave Wire Comp Lett, 2017, 27(4): 377 doi: 10.1109/LMWC.2017.2679047
[6]
Ku B H, Baek S H, Hong S, et al. A wideband transformed coupled CMOS power amplifier for X-band multifunction chips. IEEE Trans Microw Theory Tech, 2011, 59(6): 1599 doi: 10.1109/TMTT.2011.2131676
[7]
Wang H, Sideris C, Hajimiri A. A 5.2-to-13 GHz class-AB CMOS power amplifier with a 25.2 dBm peak output power at 21.6% PAE. ISSCC Dig Tech Pap, 2010: 44
[8]
Vigilante M, Raynaert P. A 29–57 GHz AM-PM compensated class-AB power amplifier for 5G phased arrays in 0.9 V 28 nm bulk CMOS. Radio Frequency Integrated Circuits Symposium (RFIC), 2017: 116
[9]
Larie A, Kerhervé E, Martineau B, et al. A wideband 65 nm CMOS transformer-coupled power amplifier for WiGig applications. European Microwave Integrated Circuit Conference, 2014: 41
[10]
Chen Y F, Quan J H, Hu L L. A 6–18 GHz broadband power amplifier MMIC with excellent efficiency. J Semicond, 2014, 35(1): 015007 doi: 10.1088/1674-4926/35/1/015007
[11]
Park S, Jeon S. Wideband harmonic-tuned CMOS power amplifier with 19.5 dBm output power and 22.6% PAE over entire X-band. Electron Lett, 2015, 52(9): 603
[12]
Li C H, Kuo C N, Kuo M C, et al. A 1.2 V 5.2 mW 20–30 GHz receiver front-end in 0.18 μm CMOS. IEEE Trans. Microw Theory Tech, 2012, 60(11): 3502 doi: 10.1109/TMTT.2012.2216285
[13]
Shakib S, Park H, Dunworth J, et al. A highly efficient and linear power amplifier for 28-GHz 5G phased array radios in 28-nm CMOS. IEEE J Solid-State Circuits, 2016, 51(12): 3020 doi: 10.1109/JSSC.2016.2606584
[14]
Kulkarni S, Raynaert P. A push-pull mm-wave power amplifier with 0.8°AM-PM distortion in 40 nm CMOS. ISSCC, 2014: 252
[15]
Zhao D X, Reaynaert P. A 60 GHz dual-mode class AB power amplifier in 45 nm CMOS. IEEE J Solid-State Circuits, 2013, 48(10): 2775
[16]
Park B, Jin S, Kim B, et al. Highly linear mm-wave CMOS power amplifier. IEEE Trans Microw Theory Tech, 2016, 64(12): 4535 doi: 10.1109/TMTT.2016.2623706
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    Received: 24 June 2018 Revised: 07 August 2018 Online: Uncorrected proof: 09 October 2018Published: 13 December 2018

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      Jie Gong, Wei Li, Jintao Hu, Jiao Ye, Tao Wang. An 8–18 GHz power amplifier with novel gain fluctuation compensation technique in 65 nm CMOS[J]. Journal of Semiconductors, 2018, 39(12): 125008. doi: 10.1088/1674-4926/39/12/125008 J Gong, W Li, J T Hu, J Ye, T Wang, An 8–18 GHz power amplifier with novel gain fluctuation compensation technique in 65 nm CMOS[J]. J. Semicond., 2018, 39(12): 125008. doi: 10.1088/1674-4926/39/12/125008.Export: BibTex EndNote
      Citation:
      Jie Gong, Wei Li, Jintao Hu, Jiao Ye, Tao Wang. An 8–18 GHz power amplifier with novel gain fluctuation compensation technique in 65 nm CMOS[J]. Journal of Semiconductors, 2018, 39(12): 125008. doi: 10.1088/1674-4926/39/12/125008

      J Gong, W Li, J T Hu, J Ye, T Wang, An 8–18 GHz power amplifier with novel gain fluctuation compensation technique in 65 nm CMOS[J]. J. Semicond., 2018, 39(12): 125008. doi: 10.1088/1674-4926/39/12/125008.
      Export: BibTex EndNote

      An 8–18 GHz power amplifier with novel gain fluctuation compensation technique in 65 nm CMOS

      doi: 10.1088/1674-4926/39/12/125008
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      Project supported partly by the National Natural Science Foundation of China (No. 60123456) and partly by the National 13th Five-Year Project.

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      • Corresponding author: Email: w-li@fudan.edu.cn
      • Received Date: 2018-06-24
      • Revised Date: 2018-08-07
      • Published Date: 2018-12-01

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