SEMICONDUCTOR INTEGRATED CIRCUITS

A 3.1–4.8 GHz CMOS receiver for MB-OFDM UWB

Yang Guang, Yao Wang, Yin Jiangwei, Zheng Renliang, Li Wei, Li Ning and Ren Junyan

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Abstract: An integrated fully differential ultra-wideband CMOS receiver for 3.1-4.8 GHz MB-OFDM systems is presented. A gain controllable low noise amplifier and a merged quadrature mixer are integrated as the RF front-end. Five order Gm-C type low pass filters and VGAs are also integrated for both I and Q IF paths in the receiver. The ESD protected chip is fabricated in a Jazz 0.18 μm RF CMOS process and achieves a maximum total voltage gain of 65 dB, an AGC range of 45 dB with about 6 dB/step, an averaged total noise figure of 6.4 to 8.8 dB over 3 bands and an in-band IIP3 of -5.1 dBm. The receiver occupies 2.3 mm2 and consumes 110 mA from a 1.8 V supply including test buffers and a digital module.

Key words: ultra-wideband

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    Received: 18 August 2015 Revised: Online: Published: 01 January 2009

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      Yang Guang, Yao Wang, Yin Jiangwei, Zheng Renliang, Li Wei, Li Ning, Ren Junyan. A 3.1–4.8 GHz CMOS receiver for MB-OFDM UWB[J]. Journal of Semiconductors, 2009, 30(1): 015005. doi: 10.1088/1674-4926/30/1/015005 Yang G, Yao W, Yin J W, Zheng R L, Li W, Li N, Ren J Y. A 3.1–4.8 GHz CMOS receiver for MB-OFDM UWB[J]. J. Semicond., 2009, 30(1): 015005. doi:  10.1088/1674-4926/30/1/015005.Export: BibTex EndNote
      Citation:
      Yang Guang, Yao Wang, Yin Jiangwei, Zheng Renliang, Li Wei, Li Ning, Ren Junyan. A 3.1–4.8 GHz CMOS receiver for MB-OFDM UWB[J]. Journal of Semiconductors, 2009, 30(1): 015005. doi: 10.1088/1674-4926/30/1/015005

      Yang G, Yao W, Yin J W, Zheng R L, Li W, Li N, Ren J Y. A 3.1–4.8 GHz CMOS receiver for MB-OFDM UWB[J]. J. Semicond., 2009, 30(1): 015005. doi:  10.1088/1674-4926/30/1/015005.
      Export: BibTex EndNote

      A 3.1–4.8 GHz CMOS receiver for MB-OFDM UWB

      doi: 10.1088/1674-4926/30/1/015005
      • Received Date: 2015-08-18

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