SEMICONDUCTOR INTEGRATED CIRCUITS

Monte Carlo analysis of a low power domino gate under parameter fluctuation

Wang Jinhui, Wu Wuchen, Gong Na, Hou Ligang, Peng Xiaohong and Gao Daming

+ Author Affiliations

PDF

Abstract: Using the multiple-parameter Monte Carlo method, the effectiveness of the dual threshold voltage technique (DTV) in low power domino logic design is analyzed. Simulation results indicate that under significant temperature and process fluctuations, DTV is still highly effective in reducing the total leakage and active power consumption for domino gates with speed loss. Also, regarding power and delay characteristics, different structure domino gates with DTV have different robustness against temperature and process fluctuation.

Key words: domino gate temperature and process ?uctuation e?ectiveness

  • Search

    Advanced Search >>

    GET CITATION

    shu

    Export: BibTex EndNote

    Article Metrics

    Article views: 4240 Times PDF downloads: 1580 Times Cited by: 0 Times

    History

    Received: 18 August 2015 Revised: 09 July 2009 Online: Published: 01 December 2009

    Catalog

      Email This Article

      User name:
      Email:*请输入正确邮箱
      Code:*验证码错误
      Wang Jinhui, Wu Wuchen, Gong Na, Hou Ligang, Peng Xiaohong, Gao Daming. Monte Carlo analysis of a low power domino gate under parameter fluctuation[J]. Journal of Semiconductors, 2009, 30(12): 125010. doi: 10.1088/1674-4926/30/12/125010 Wang J H, Wu W C, Gong N, Hou L G, Peng X H, Gao D M. Monte Carlo analysis of a low power domino gate under parameter fluctuation[J]. J. Semicond., 2009, 30(12): 125010. doi: 10.1088/1674-4926/30/12/125010.Export: BibTex EndNote
      Citation:
      Wang Jinhui, Wu Wuchen, Gong Na, Hou Ligang, Peng Xiaohong, Gao Daming. Monte Carlo analysis of a low power domino gate under parameter fluctuation[J]. Journal of Semiconductors, 2009, 30(12): 125010. doi: 10.1088/1674-4926/30/12/125010

      Wang J H, Wu W C, Gong N, Hou L G, Peng X H, Gao D M. Monte Carlo analysis of a low power domino gate under parameter fluctuation[J]. J. Semicond., 2009, 30(12): 125010. doi: 10.1088/1674-4926/30/12/125010.
      Export: BibTex EndNote

      Monte Carlo analysis of a low power domino gate under parameter fluctuation

      doi: 10.1088/1674-4926/30/12/125010
      • Received Date: 2015-08-18
      • Accepted Date: 2009-06-05
      • Revised Date: 2009-07-09
      • Published Date: 2009-12-04

      Catalog

        /

        DownLoad:  Full-Size Img  PowerPoint
        Return
        Return