SEMICONDUCTOR INTEGRATED CIRCUITS

Designof a 40-GHz LNA in 0.13-μm SiGe BiCMOS

Xu Leijun, Wang Zhigong, Li Qin and Zhao Yan

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Abstract: A low-noise amplifier (LNA) operated at 40 GHz is designed. An improved cascode configuration is proposed and the design of matching networks is presented. Short-circuited coplanar waveguides (CPWs) were used as inductors to achieve a high Q-factor. The circuit was fabricated in a 0.13-μm SiGe BiCMOS technology with a transistor transit frequency fT of 103 GHz. The chip area is 0.21 mm2. The LNA has one cascode stage with a –3 dB bandwidth from 34 to 44 GHz. At 40 GHz, the measured gain is 8.6 dB; the input return loss, S11, is –16.2 dB; and the simulated noise figure is 5 dB. The circuit draws a current of only 3 mA from a 2.5 V supply.

Key words: low-noise amplifier BiCMOS millimeter wave coplanar waveguide matching network

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    Received: 18 August 2015 Revised: 30 October 2008 Online: Published: 01 May 2009

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      Xu Leijun, Wang Zhigong, Li Qin, Zhao Yan. Designof a 40-GHz LNA in 0.13-μm SiGe BiCMOS[J]. Journal of Semiconductors, 2009, 30(5): 055005. doi: 10.1088/1674-4926/30/5/055005 Xu L J, Wang Z G, Li Q, Zhao Y. Designof a 40-GHz LNA in 0.13-μm SiGe BiCMOS[J]. J. Semicond., 2009, 30(5): 055005. doi:  10.1088/1674-4926/30/5/055005.Export: BibTex EndNote
      Citation:
      Xu Leijun, Wang Zhigong, Li Qin, Zhao Yan. Designof a 40-GHz LNA in 0.13-μm SiGe BiCMOS[J]. Journal of Semiconductors, 2009, 30(5): 055005. doi: 10.1088/1674-4926/30/5/055005

      Xu L J, Wang Z G, Li Q, Zhao Y. Designof a 40-GHz LNA in 0.13-μm SiGe BiCMOS[J]. J. Semicond., 2009, 30(5): 055005. doi:  10.1088/1674-4926/30/5/055005.
      Export: BibTex EndNote

      Designof a 40-GHz LNA in 0.13-μm SiGe BiCMOS

      doi: 10.1088/1674-4926/30/5/055005
      • Received Date: 2015-08-18
      • Accepted Date: 2008-10-30
      • Revised Date: 2008-10-30
      • Published Date: 2009-04-20

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