Abstract: A new partial-SOI (PSOI) high voltage device structure named CNCI PSOI (complementary n⁺-charge islands PSOI) is proposed. CNCI PSOI is characterized by equidistant high concentration n⁺-regions on the top and bottom interfaces of a dielectric buried layer of a PSOI device. When a high voltage is applied to the device, complementary holes and electron islands are formed on the two n⁺-regions on the top and bottom interfaces, therefore effectively enhancing the electric field of the dielectric buried layer (E_I) and increasing the breakdown voltage (BV), alleviating the self-heating effect (SHE) by the silicon window under the source. An analytical model of the vertical interface electric field for the CNCI PSOI is presented and the analytical results are in good agreement with the 2D simulation results. BV and E_I of the CNCI PSOI LDMOS increase to 591 V and 512 V/μm from 216 V and 81.4 V/μm of the conventional PSOI with a lower SHE, respectively. The influence of structure parameters on the device characteristics is analyzed for the proposed device in detail.

Key words: PSOI, complementary, charge islands, breakdown voltage, SHE