SEMICONDUCTOR INTEGRATED CIRCUITS

Design of a high performance CMOS charge pump for phase-locked loop synthesizers

Li Zhiqun, Zheng Shuangshuang and Hou Ningbing

+ Author Affiliations

PDF

Abstract: A new high performance charge pump circuit is designed and realized in 0.18 μ m CMOS process. A wide input ranged rail-to-rail operational amplifier and self-biasing cascode current mirror are used to enable the charge pump current to be well matched in a wide output voltage range. Furthermore, a method of adding a precharging current source is proposed to increase the initial charge current, which will speed up the settling time of CPPLLs. Test results show that the current mismatching can be less than 0.4% in the output voltage range of 0.4 to 1.7 V, with a charge pump current of 100 μ A and a precharging current of 70 μ A. The average power consumption of the charge pump in the locked condition is around 0.9 mW under a 1.8 V supply voltage.

Key words: charge pump

[1]
[2]
[3]
[4]
[5]
[6]
  • Search

    Advanced Search >>

    GET CITATION

    shu

    Export: BibTex EndNote

    Article Metrics

    Article views: 3494 Times PDF downloads: 9217 Times Cited by: 0 Times

    History

    Received: 18 August 2015 Revised: 14 February 2011 Online: Published: 01 July 2011

    Catalog

      Email This Article

      User name:
      Email:*请输入正确邮箱
      Code:*验证码错误
      Li Zhiqun, Zheng Shuangshuang, Hou Ningbing. Design of a high performance CMOS charge pump for phase-locked loop synthesizers[J]. Journal of Semiconductors, 2011, 32(7): 075007. doi: 10.1088/1674-4926/32/7/075007 Li Z Q, Zheng S S, Hou N B. Design of a high performance CMOS charge pump for phase-locked loop synthesizers[J]. J. Semicond., 2011, 32(7): 075007. doi: 10.1088/1674-4926/32/7/075007.Export: BibTex EndNote
      Citation:
      Li Zhiqun, Zheng Shuangshuang, Hou Ningbing. Design of a high performance CMOS charge pump for phase-locked loop synthesizers[J]. Journal of Semiconductors, 2011, 32(7): 075007. doi: 10.1088/1674-4926/32/7/075007

      Li Z Q, Zheng S S, Hou N B. Design of a high performance CMOS charge pump for phase-locked loop synthesizers[J]. J. Semicond., 2011, 32(7): 075007. doi: 10.1088/1674-4926/32/7/075007.
      Export: BibTex EndNote

      Design of a high performance CMOS charge pump for phase-locked loop synthesizers

      doi: 10.1088/1674-4926/32/7/075007
      Funds:

      The National High Technology Research and Development Program of China (863 Program)

      • Received Date: 2015-08-18
      • Accepted Date: 2011-01-06
      • Revised Date: 2011-02-14
      • Published Date: 2011-06-22

      Catalog

        /

        DownLoad:  Full-Size Img  PowerPoint
        Return
        Return