SEMICONDUCTOR INTEGRATED CIRCUITS

A 0.18 μm CMOS single-inductor single-stage quadrature frontend for GNSS receiver

Li Bing, Zhuang Yiqi, Han Yeqi, Xing Xiaoling, Li Zhenrong and Long Qiang

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Abstract: This paper presents an improved merged architecture for a low-IF GNSS receiver frontend, where the bias current and functions are reused in a stacked quadrature LNA-mixer-VCO. Only a single spiral inductor is implemented for the LC resonator and an extra 1/2 frequency divider is added as the quadrature LO signal generator. The details of the design are presented. The gain plan and noise figure are discussed. The phase noise, quadrature accuracy and power consumption are improved. The test chip is fabricated though a 0.18 μm RF CMOS process. The measured noise figure is 5.4 dB on average, with a gain of 43 dB and a IIP3 of -39 dBm. The measured phase noise is better than -105 dBc/Hz at 1 MHz offset. The total power consumption is 19.8 mW with a 1.8 V supply. The experimental results satisfy the requirements for GNSS applications.

Key words: low powercurrent reuselow-IF architectureRF frontendmixerGNSS压控振荡器CMOS卫星导航GPS

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    Received: 20 August 2015 Revised: 02 May 2011 Online: Published: 01 September 2011

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      Li Bing, Zhuang Yiqi, Han Yeqi, Xing Xiaoling, Li Zhenrong, Long Qiang. A 0.18 μm CMOS single-inductor single-stage quadrature frontend for GNSS receiver[J]. Journal of Semiconductors, 2011, 32(9): 095005. doi: 10.1088/1674-4926/32/9/095005 Li B, Zhuang Y Q, Han Y Q, Xing X L, Li Z R, Long Q. A 0.18 μm CMOS single-inductor single-stage quadrature frontend for GNSS receiver[J]. J. Semicond., 2011, 32(9): 095005. doi: 10.1088/1674-4926/32/9/095005.Export: BibTex EndNote
      Citation:
      Li Bing, Zhuang Yiqi, Han Yeqi, Xing Xiaoling, Li Zhenrong, Long Qiang. A 0.18 μm CMOS single-inductor single-stage quadrature frontend for GNSS receiver[J]. Journal of Semiconductors, 2011, 32(9): 095005. doi: 10.1088/1674-4926/32/9/095005

      Li B, Zhuang Y Q, Han Y Q, Xing X L, Li Z R, Long Q. A 0.18 μm CMOS single-inductor single-stage quadrature frontend for GNSS receiver[J]. J. Semicond., 2011, 32(9): 095005. doi: 10.1088/1674-4926/32/9/095005.
      Export: BibTex EndNote

      A 0.18 μm CMOS single-inductor single-stage quadrature frontend for GNSS receiver

      doi: 10.1088/1674-4926/32/9/095005
      • Received Date: 2015-08-20
      • Accepted Date: 2011-01-26
      • Revised Date: 2011-05-02
      • Published Date: 2011-08-31

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