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A 18-mW, 20-MHz bandwidth, 12-bit continuous-time ΣΔ modulator using a power-efficient multi-stage amplifier

Li Ran, Li Jing, Yi Ting and Hong Zhiliang

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Abstract: A fourth-order continuous-time sigma delta modulator with 20-MHz bandwidth, implemented in 130-nm CMOS technology is presented. The modulator is comprised of an active-RC operational-amplifier based loop filter, a 4-bit internal quantizer and three current steering feedback DACs. A three-stage amplifier with low power is designed to satisfy the requirement of high dc gain and high gain-bandwidth product of the loop filter. Non-return-to-zero DAC pulse shaping is utilized to reduce clock jitter sensitivity. A special layout technique guarantees that the main feedback DAC reaches 12-bit match accuracy, avoiding the use of a dynamic element matching algorithm to induce excess loop delay. The experimental results demonstrate a 64.6-dB peak signal-to-noise ratio, and 66-dB dynamic range over a 20-MHz signal bandwidth when clocked at 480 MHz with 18-mW power consumption from a 1.2-V supply.

Key words: continuous-time

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    Received: 20 August 2015 Revised: 31 August 2011 Online: Published: 01 January 2012

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      Li Ran, Li Jing, Yi Ting, Hong Zhiliang. A 18-mW, 20-MHz bandwidth, 12-bit continuous-time ΣΔ modulator using a power-efficient multi-stage amplifier[J]. Journal of Semiconductors, 2012, 33(1): 015007. doi: 10.1088/1674-4926/33/1/015007 Li R, Li J, Yi T, Hong Z L. A 18-mW, 20-MHz bandwidth, 12-bit continuous-time ΣΔ modulator using a power-efficient multi-stage amplifier[J]. J. Semicond., 2012, 33(1): 015007. doi: 10.1088/1674-4926/33/1/015007.Export: BibTex EndNote
      Citation:
      Li Ran, Li Jing, Yi Ting, Hong Zhiliang. A 18-mW, 20-MHz bandwidth, 12-bit continuous-time ΣΔ modulator using a power-efficient multi-stage amplifier[J]. Journal of Semiconductors, 2012, 33(1): 015007. doi: 10.1088/1674-4926/33/1/015007

      Li R, Li J, Yi T, Hong Z L. A 18-mW, 20-MHz bandwidth, 12-bit continuous-time ΣΔ modulator using a power-efficient multi-stage amplifier[J]. J. Semicond., 2012, 33(1): 015007. doi: 10.1088/1674-4926/33/1/015007.
      Export: BibTex EndNote

      A 18-mW, 20-MHz bandwidth, 12-bit continuous-time ΣΔ modulator using a power-efficient multi-stage amplifier

      doi: 10.1088/1674-4926/33/1/015007
      • Received Date: 2015-08-20
      • Accepted Date: 2011-06-22
      • Revised Date: 2011-08-31
      • Published Date: 2011-12-28

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