Abstract: To achieve a constant current limit, low power consumption and high driving capability, a micro-power LDO with a piecewise voltage-foldback current-limit circuit is presented. The current-limit threshold is dynamically adjusted to achieve a maximum driving capability and lower quiescent current of only 300 nA. To increase the loop stability of the proposed LDO, a high impedance transconductance buffer under a micro quiescent current is designed for splitting the pole that exists at the gate of the pass transistor to the dominant pole, and a zero is designed for the purpose of the second pole phase compensation. The proposed LDO is fabricated in a BiCMOS process. The measurement results show that the short-circuit current of the LDO is 190 mA, the constant limit current under a high drop-out voltage is 440 mA, and the maximum load current under a low drop-out voltage is up to 800 mA. In addition, the quiescent current of the LDO is only 7 μA, the load regulation is about 0.56% on full scale, the line regulation is about 0.012%/V, the PSRR at 120 Hz is 58 dB and the drop-out voltage is only 70 mV when the load current is 250 mA.

Key words: power protection, voltage foldback, current limit