SEMICONDUCTOR INTEGRATED CIRCUITS

Power-aware transceiver design for half-duplex bidirectional chip-to-chip optical interconnects

Jamshid Sangirov1, Ikechi Augustine Ukaegbu1, Gulomjon Sangirov2, Tae-Woo Lee1 and Hyo-Hoon Park1

+ Author Affiliations

 Corresponding author: Jamshid Sangirov, jamshid@kaist.ac.kr

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Abstract: A power-aware transceiver for half-duplex bidirectional chip-to-chip optical interconnects has been designed and fabricated in a 0.13 μm complementary metal-oxide-semiconductor (CMOS) technology. The transceiver can detect the presence and absence of received signals and saves 55% power in Rx enabled mode and 45% in Tx enabled mode. The chip occupies an area of 1.034 mm2 and achieves a 3-dB bandwidth of 6 GHz and 7 GHz in Tx and Rx modes, respectively. The disabled outputs for the Tx and Rx modes are isolated with 180 dB and 139 dB, respectively, from the enabled outputs. Clear eye diagrams are obtained at 4.25 Gbps for both the Tx and Rx modes.

Key words: optical transceiverpower detectoroptical interconnectvoltage regulator



[1]
Pitwon R C A, Wang K, Jones J G, et al. First light:pluggable optical interconnect technologies for polymeric electro-optical printed circuit boards in data centers. J Lightwave Technol, 2012, 30(21):3316 doi: 10.1109/JLT.2012.2214764
[2]
Sangirov J, Ukaegbu I A, Lee T W, et al. Signal synchronization using a flicker reduction and denoising algorithm for video-signal optical interconnect. ETRI Journal, 2012, 34(1):122 https://etrij.etri.re.kr/etrij/journal/article/article.do?volume=34&issue=1&page=122
[3]
Hui X, Jun F, Quan L, et al. A 3.125-Gb/s inductorless transimpedance amplifier for optical communication in 0.35μm CMOS. Journal of Semiconductors, 2011, 32(10):105003 doi: 10.1088/1674-4926/32/10/105003
[4]
Kang S K, Lee T W, Plant D V, et al. A novel bidirectional CMOS transceiver for chip-to-chip optical interconnects. IEEE Photonics Technol Lett, 2006, 18(1):70 doi: 10.1109/LPT.2005.859993
[5]
Ngo T H, Nga T H N, Ukaegbu I A, et al. Bidirectional CMOS transceiver with automatic mode control for chip-to-chip optical interconnects. IEEE Photonics Technol Lett, 2009, 21(17):1241 doi: 10.1109/LPT.2009.2025045
[6]
Sangirov J, Ukaegbu I A, Lee T W, et al. Short turn-on/off time linear voltage regulator with data detector for power-aware optical interconnect system. Opto-Electronics and Communications Conference (OECC), 2012:109 http://ieeexplore.ieee.org/abstract/document/6276395/
[7]
Zhang T, Eisenstadt W R, Fox R M. 20 GHz bipolar RF RMS power detectors. BiCMOS Circuits and Technology Meetings Conference, 2005:204 http://ieeexplore.ieee.org/document/1555232/keywords
[8]
Razavi B. Design of analog CMOS integrated circuits. McGraw-Hill, 2001
[9]
[10]
Sangirov J, Ukaegbu I A, Lee T W, et al. 10 Gbps transimpedance amplifier-receiver for optical interconnects. J Optical Society of Korea, 2013, 17(1):44 doi: 10.3807/JOSK.2013.17.1.044
[11]
Huang H Y, Chien J C, Lu L H. A 10-Gb/s inductorless CMOS limiting amplifier with third-order interleaving active feedback. IEEE J Solid-State Circuits, 2007, 42(5):1111 doi: 10.1109/JSSC.2007.894819
Fig. 1.  The block diagram of the proposed power-aware optical chip-to-chip transceiver design.

Fig. 2.  (a) The circuit schematic of a single-cell of the power detector input and output stage of power detector. (b) Input versus output dynamic range of power detector. (c) Power detector output response time versus input data signal.

Fig. 3.  (a) The circuit schematic of the power control switch, and (b)-(i) the input and (b)-(ii) output response of the power control switch operation (switching pulse for the voltage regulator).

Fig. 4.  (a) Voltage regulator, and (b) transient response of the voltage regulator.

Fig. 5.  Simulated frequency response: gain isolation of the enabled and the disabled outputs in Tx and Rx operating modes, respectively.

Fig. 6.  Photograph of the fabricated chip.

Fig. 7.  The eye diagram of Rx and Tx at 4.25 Gbps.

Table 1.   A comparison of the proposed power-aware transceiver with other works.

[1]
Pitwon R C A, Wang K, Jones J G, et al. First light:pluggable optical interconnect technologies for polymeric electro-optical printed circuit boards in data centers. J Lightwave Technol, 2012, 30(21):3316 doi: 10.1109/JLT.2012.2214764
[2]
Sangirov J, Ukaegbu I A, Lee T W, et al. Signal synchronization using a flicker reduction and denoising algorithm for video-signal optical interconnect. ETRI Journal, 2012, 34(1):122 https://etrij.etri.re.kr/etrij/journal/article/article.do?volume=34&issue=1&page=122
[3]
Hui X, Jun F, Quan L, et al. A 3.125-Gb/s inductorless transimpedance amplifier for optical communication in 0.35μm CMOS. Journal of Semiconductors, 2011, 32(10):105003 doi: 10.1088/1674-4926/32/10/105003
[4]
Kang S K, Lee T W, Plant D V, et al. A novel bidirectional CMOS transceiver for chip-to-chip optical interconnects. IEEE Photonics Technol Lett, 2006, 18(1):70 doi: 10.1109/LPT.2005.859993
[5]
Ngo T H, Nga T H N, Ukaegbu I A, et al. Bidirectional CMOS transceiver with automatic mode control for chip-to-chip optical interconnects. IEEE Photonics Technol Lett, 2009, 21(17):1241 doi: 10.1109/LPT.2009.2025045
[6]
Sangirov J, Ukaegbu I A, Lee T W, et al. Short turn-on/off time linear voltage regulator with data detector for power-aware optical interconnect system. Opto-Electronics and Communications Conference (OECC), 2012:109 http://ieeexplore.ieee.org/abstract/document/6276395/
[7]
Zhang T, Eisenstadt W R, Fox R M. 20 GHz bipolar RF RMS power detectors. BiCMOS Circuits and Technology Meetings Conference, 2005:204 http://ieeexplore.ieee.org/document/1555232/keywords
[8]
Razavi B. Design of analog CMOS integrated circuits. McGraw-Hill, 2001
[9]
[10]
Sangirov J, Ukaegbu I A, Lee T W, et al. 10 Gbps transimpedance amplifier-receiver for optical interconnects. J Optical Society of Korea, 2013, 17(1):44 doi: 10.3807/JOSK.2013.17.1.044
[11]
Huang H Y, Chien J C, Lu L H. A 10-Gb/s inductorless CMOS limiting amplifier with third-order interleaving active feedback. IEEE J Solid-State Circuits, 2007, 42(5):1111 doi: 10.1109/JSSC.2007.894819
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    Received: 14 June 2013 Revised: 12 July 2013 Online: Published: 01 December 2013

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      Jamshid Sangirov, Ikechi Augustine Ukaegbu, Gulomjon Sangirov, Tae-Woo Lee, Hyo-Hoon Park. Power-aware transceiver design for half-duplex bidirectional chip-to-chip optical interconnects[J]. Journal of Semiconductors, 2013, 34(12): 125001. doi: 10.1088/1674-4926/34/12/125001 J Sangirov, I A Ukaegbu, G Sangirov, T W Lee, H H Park. Power-aware transceiver design for half-duplex bidirectional chip-to-chip optical interconnects[J]. J. Semicond., 2013, 34(12): 125001. doi:  10.1088/1674-4926/34/12/125001.Export: BibTex EndNote
      Citation:
      Jamshid Sangirov, Ikechi Augustine Ukaegbu, Gulomjon Sangirov, Tae-Woo Lee, Hyo-Hoon Park. Power-aware transceiver design for half-duplex bidirectional chip-to-chip optical interconnects[J]. Journal of Semiconductors, 2013, 34(12): 125001. doi: 10.1088/1674-4926/34/12/125001

      J Sangirov, I A Ukaegbu, G Sangirov, T W Lee, H H Park. Power-aware transceiver design for half-duplex bidirectional chip-to-chip optical interconnects[J]. J. Semicond., 2013, 34(12): 125001. doi:  10.1088/1674-4926/34/12/125001.
      Export: BibTex EndNote

      Power-aware transceiver design for half-duplex bidirectional chip-to-chip optical interconnects

      doi: 10.1088/1674-4926/34/12/125001
      Funds:

      Project supported by the IT R & D Program of MKE/KEIT[No. 10039230, Development of bidirectional 40 Gbps optical link module with low power in Green Data Centre for Smart Working Environment] and the Center for Integrated Smart Sensors funded by the Ministry of Education, Science and Technology as Global Frontier Project (No. CISS-2012366054191)

      the Center for Integrated Smart Sensors funded by the Ministry of Education, Science and Technology as Global Frontier Project CISS-2012366054191

      the IT R & D Program of MKE/KEIT 10039230

      More Information
      • Corresponding author: Jamshid Sangirov, jamshid@kaist.ac.kr
      • Received Date: 2013-06-14
      • Revised Date: 2013-07-12
      • Published Date: 2013-12-01

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