Fig. 1.
Cross-sectional view and equivalent circuit of the different power devices. (a) The power MOSFET structure. (b) The IGBT structure.
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Jiang Lu, Xiaoli Tian, Shuojin Lu, Hongyu Zhou, Yangjun Zhu, Zhengsheng Han. Dynamic avalanche behavior of power MOSFETs and IGBTs under unclamped inductive switching conditions[J]. Journal of Semiconductors, 2013, 34(3): 034002. doi: 10.1088/1674-4926/34/3/034002
J Lu, X L Tian, S J Lu, H Y Zhou, Y J Zhu, Z S Han. Dynamic avalanche behavior of power MOSFETs and IGBTs under unclamped inductive switching conditions[J]. J. Semicond., 2013, 34(3): 034002. doi: 10.1088/1674-4926/34/3/034002.
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Dynamic avalanche behavior of power MOSFETs and IGBTs under unclamped inductive switching conditions
doi: 10.1088/1674-4926/34/3/034002
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Abstract
The ability of high-voltage power MOSFETs and IGBTs to withstand avalanche events under unclamped inductive switching (UIS) conditions is measured. This measurement is to investigate and compare the dynamic avalanche failure behavior of the power MOSFETs and the IGBT, which occur at different current conditions. The UIS measurement results at different current conditions show that the main failure reason of the power MOSFETs is related to the parasitic bipolar transistor, which leads to the deterioration of the avalanche reliability of power MOSFETs. However, the results of the IGBT show two different failure behaviors. At high current mode, the failure behavior is similar to the power MOSFETs situation. But at low current mode, the main failure mechanism is related to the parasitic thyristor activity during the occurrence of the avalanche process and which is in good agreement with the experiment result.-
Keywords:
- UIS test,
- parasitic bipolar transistor,
- power MOSFETs,
- IGBT,
- parasitic thyristor
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References
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