SEMICONDUCTOR DEVICES

Stability analysis of a back-gate graphene transistor in air environment

Kunpeng Jia, Jie Yang, Yajuan Su, Pengfei Nie, Jian Zhong, Qingqing Liang and Huilong Zhu

+ Author Affiliations

 Corresponding author: Jia Kunpeng, suyajuan@ime.ac.cn; Su Yajuan, jiakunpeng@ime.ac.cn

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Abstract: The stability of a graphene field effect transistor (GFET) is important to its performance optimization, and study of hysteresis behavior can propose useful suggestions for GFET fabrication and optimization. In this work, a back-gate GFET has been fabricated and characterized, which is compatible with the CMOS process. The stability of a GFET in air has been studied and it is found that a GFET's electrical performance dramatically changes when exposed to air. The hysteresis characteristic of a GFET depending on time has been observed and analyzed systematically. Hysteresis behavior is reversed at room temperature with the Dirac point positive shifted when the GFET is exposed to air after annealing.

Key words: graphene FETstabilityback-gatehysteresis



[1]
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Lin Y M, Jenkins K A, Valdes-Garcia A, et al. Operation of graphene transistors at gigahertz frequencies. Nano Lett, 2009, 9(1):422 doi: 10.1021/nl803316h
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Han S J, Valdes-Garcia A, Bol A A, et al. Graphene technology with inverted-T gate and RF passives on 200 mm platform. International Electron Devices Meeting, 2011:2.2.1 http://ieeexplore.ieee.org/document/6131473/authors
[4]
Liao L, Lin Y C, Bao M, et al. High-speed graphene transistors with a self-aligned nanowire gate. Nature, 2010, 467(7313):305 doi: 10.1038/nature09405
[5]
Kim S M, Song E B, Lee S, et al. Flexible and transparent memory. 20124th IEEE International Memory Workshop (IMW), 2012:1 http://escholarship.org/uc/item/42c6w65s?query=flexible
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[9]
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[10]
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[11]
Wang H, Wu Y, Cong C, et al. Hysteresis of electronic transport in graphene transistors. ACS Nano, 2010, 4(12):7221 doi: 10.1021/nn101950n
[12]
Kalon G, Shin Y J, Truong V G, et al. The role of charge traps in inducing hysteresis:capacitance-voltage measurements on top gated bilayer graphene. Appl Phys Lett, 2011, 99(8):083109 doi: 10.1063/1.3626854
[13]
Joshi P, Romero H E, Neal A T, et al. Intrinsic doping and gate hysteresis in graphene field effect devices fabricated on SiO2 substrates. Journal of Physics Condensed Matter, 2010, 22(33):334214 doi: 10.1088/0953-8984/22/33/334214
[14]
Liao Z M, Han B H, Zhou Y B, et al. Hysteresis reversion in graphene field-effect transistors. J Chem Phys, 2010, 133(4):044703 doi: 10.1063/1.3460798
Fig. 1.  Schematic structure of a back-gate graphene field effect transistor.

Fig. 2.  Optical microscopy image of a GFET.

Fig. 3.  (a) Optical microscopy bright field image of GFET after graphene transfer. (b) Optical microscopy dark field image of GFET after graphene transfer that was captured at the same position with (a). (c) Raman spectrum of graphene. Inset of (c) shows a Lorentz fit of the 2D peak.

Fig. 4.  Drain current and GM versus gate voltage. On current is 336.4 $\mu$A, off current is 27.8 $\mu$A and the Dirac point lies at 5.5 V.

Fig. 5.  Transfer characteristics of the GFET labeled by "Original", "After a month" and "After annealing". The original curve was obtained as soon as device fabrication finished.

Fig. 6.  The abstraction methods of $\Delta$DP and $\Delta I_{\rm ds}$.

Fig. 7.  Forward sweep Dirac points and backward sweep Dirac points at different times after annealing and before annealing.

Fig. 8.  Dirac point variation trend and Dirac point difference variation trend versus time.

Fig. 9.  Drain current difference at the zero gate voltage versus time.

Fig. 10.  Schematic of the bipolar molecule induced local electric field enhancement effect.

[1]
Novoselov K S, Geim A K, Morozov S V, et al. Electric field effect in atomically thin carbon films. Science (New York, N.Y.), 2004, 306(5696):666 doi: 10.1126/science.1102896
[2]
Lin Y M, Jenkins K A, Valdes-Garcia A, et al. Operation of graphene transistors at gigahertz frequencies. Nano Lett, 2009, 9(1):422 doi: 10.1021/nl803316h
[3]
Han S J, Valdes-Garcia A, Bol A A, et al. Graphene technology with inverted-T gate and RF passives on 200 mm platform. International Electron Devices Meeting, 2011:2.2.1 http://ieeexplore.ieee.org/document/6131473/authors
[4]
Liao L, Lin Y C, Bao M, et al. High-speed graphene transistors with a self-aligned nanowire gate. Nature, 2010, 467(7313):305 doi: 10.1038/nature09405
[5]
Kim S M, Song E B, Lee S, et al. Flexible and transparent memory. 20124th IEEE International Memory Workshop (IMW), 2012:1 http://escholarship.org/uc/item/42c6w65s?query=flexible
[6]
Rumyantsev S, Liu G, Shur M S, et al. Selective gas sensing with a single pristine graphene transistor. Nano Lett, 2012, 12(5):2294 doi: 10.1021/nl3001293
[7]
Bae S, Kim H, Lee Y, et al. Roll-to-roll production of 30-inch graphene films for transparent electrodes. Nature Nanotechnol, 2010, 5(8):574 doi: 10.1038/nnano.2010.132
[8]
Hass J, Varchon F, Millán-Otoya J, et al. Why multilayer graphene on 4H-SiC (0001) behaves like a single sheet of graphene. Phys Rev Lett, 2008, 100(12):3
[9]
Jiang R, Meng L G, Zhang X J, et al. Atomic layer deposition of an Al2O3 dielectric on ultrathin graphite by using electron beam irradiation. Journal of Semiconductors, 2012, 33(9):093004 doi: 10.1088/1674-4926/33/9/093004
[10]
Liu W J, Li M F, Xu S H, et al. Understanding the contact characteristics in single or multi-layer graphene devices:the impact of defects (carbon vacancies) and the asymmetric transportation behavior. International Electron Devices Meeting, 2010:23.3.1 https://www.infona.pl/resource/bwmeta1.element.ieee-art-000005703420
[11]
Wang H, Wu Y, Cong C, et al. Hysteresis of electronic transport in graphene transistors. ACS Nano, 2010, 4(12):7221 doi: 10.1021/nn101950n
[12]
Kalon G, Shin Y J, Truong V G, et al. The role of charge traps in inducing hysteresis:capacitance-voltage measurements on top gated bilayer graphene. Appl Phys Lett, 2011, 99(8):083109 doi: 10.1063/1.3626854
[13]
Joshi P, Romero H E, Neal A T, et al. Intrinsic doping and gate hysteresis in graphene field effect devices fabricated on SiO2 substrates. Journal of Physics Condensed Matter, 2010, 22(33):334214 doi: 10.1088/0953-8984/22/33/334214
[14]
Liao Z M, Han B H, Zhou Y B, et al. Hysteresis reversion in graphene field-effect transistors. J Chem Phys, 2010, 133(4):044703 doi: 10.1063/1.3460798
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    Received: 25 December 2012 Revised: 11 February 2013 Online: Published: 01 August 2013

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      Kunpeng Jia, Jie Yang, Yajuan Su, Pengfei Nie, Jian Zhong, Qingqing Liang, Huilong Zhu. Stability analysis of a back-gate graphene transistor in air environment[J]. Journal of Semiconductors, 2013, 34(8): 084004. doi: 10.1088/1674-4926/34/8/084004 K P Jia, J Yang, Y J Su, P F Nie, J Zhong, Q Q Liang, H L Zhu. Stability analysis of a back-gate graphene transistor in air environment[J]. J. Semicond., 2013, 34(8): 084004. doi: 10.1088/1674-4926/34/8/084004.Export: BibTex EndNote
      Citation:
      Kunpeng Jia, Jie Yang, Yajuan Su, Pengfei Nie, Jian Zhong, Qingqing Liang, Huilong Zhu. Stability analysis of a back-gate graphene transistor in air environment[J]. Journal of Semiconductors, 2013, 34(8): 084004. doi: 10.1088/1674-4926/34/8/084004

      K P Jia, J Yang, Y J Su, P F Nie, J Zhong, Q Q Liang, H L Zhu. Stability analysis of a back-gate graphene transistor in air environment[J]. J. Semicond., 2013, 34(8): 084004. doi: 10.1088/1674-4926/34/8/084004.
      Export: BibTex EndNote

      Stability analysis of a back-gate graphene transistor in air environment

      doi: 10.1088/1674-4926/34/8/084004
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      the National Sciences and Technology Major Project 02 

      Project supported by the National Sciences and Technology Major Project 02

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