SEMICONDUCTOR INTEGRATED CIRCUITS

A 2.52-mW continuous-time Σ Δ modulator with 72 dB dynamic range for FM radio

Mingyi Chen, Liguo Zhou, Chenghao Bian, Jun Yan and Yin Shi

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 Corresponding author: Chen Mingyi, Email:tjucmy@126.com

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Abstract: A continuous-time Σ Δ modulator with a third-order loop filter and a 3-bit quantizer is realized. The modulator is robust to the excess loop delay, clock jitter, and RC product variations. When designing the integrator, an op-amp with novel GBW extension structure, improving the linearity of the loop filter, is adopted. The prototype chip is designed in a 130 nm CMOS technology, targeting FM radio applications. The experimental results show that the prototype modulator achieves a 72 dB dynamic range and a 70.7 dB signal to noise and distortion ratio over a 500 kHz bandwidth with a 26 MHz clock, consuming 2.52 mW power from a 1.2 V supply.

Key words: continuous-time sigma-delta modulatorFM radiooversampling A/D converters



[1]
Breems L J, van der Zwan E J, Dijkmans E C, et al. A 1.8 mW CMOS sigma delta modulator with integrated mixer for A/D conversion of IF signals. IEEE J Solid-State Circuits, 2000, 35(4):468 doi: 10.1109/4.839907
[2]
Van der Zwan E J, Philips K, Bastiaansen C A A. A 10.7-MHz IF-to-baseband sigma delta A/D conversion system for AM/FM radio receivers. IEEE J Solid-State Circuits, 2000, 35(12):1810 doi: 10.1109/4.890294
[3]
Silva P, Breems L J, Makinwa K, et al. A 118 dB DR CT IF-to-baseband Σ Δ modulator for AM/FM/IBOC radio receivers. IEEE ISSCC Dig Tech Papers, 2006:66
[4]
Breems L J, Rutten R, van Veldhoven R, et al. A 56 mW CT quadrature cascaded sigma delta modulator with 77 dB DR in a near zero-IF 20 MHz band. IEEE ISSCC Dig Tech Papers, 2007:238
[5]
Paton S, Giandomenico A D, Hernandez L, et al. A 70-mW 300-MHz CMOS continuous-time sigma delta ADC with 15-MHz bandwidth and 11 bits of resolution. IEEE J Solid-State Circuits, 2004, 39(7):1056 doi: 10.1109/JSSC.2004.829925
[6]
Mitteregger G, Ebner C, Mechnig S, et al. A 20-mW 640-MHz CMOS continuous-time sigma-delta ADC with 20-MHz signal bandwidth, 80-dB dynamic range and 12-bit ENOB. IEEE J Solid-State Circuits, 2006, 41(12):2641 doi: 10.1109/JSSC.2006.884332
[7]
Schoofs R, Steyaert M S J, Sanse W M C. A design-optimized continuous-time delta-sigma ADC for WLAN applications. IEEE Trans Circuits Syst I, 2007, 54(1):209 doi: 10.1109/TCSI.2006.887455
[8]
Li Z M, Fiez T S. A 14 bit continuous-time delta-sigma A/D modulator with 2.5 MHz signal bandwidth. IEEE J Solid-State Circuits, 2007, 42(9):1873 doi: 10.1109/JSSC.2007.903086
[9]
Yan S L, Sanchez-Sinencio E. A continuous-time Σ Δ modulator with 88-dB dynamic range and 1.1-MHz signal bandwidth. IEEE J Solid-State Circuits, 2004, 39(1):75 doi: 10.1109/JSSC.2003.820856
[10]
Gong Zhen, Chen Bei, Hu Xueqing, et al. A low power 8th order elliptic low-pass filter for a CMMB tuner. Journal of Semiconductors, 2011, 32(9):095002 doi: 10.1088/1674-4926/32/9/095002
[11]
Li Ran, Li Jing, Yi Ting, et al. A 18-mW, 20-MHz bandwidth, 12-bit continuous-time Σ Δ modulator using a power-efficient multi-stage amplifier. Journal of Semiconductors, 2012, 33(1):015007 doi: 10.1088/1674-4926/33/1/015007
[12]
Li Yuanwen, Qi Da, Dong Yifeng, et al. A 1-V 60-μW 85-dB dynamic range continuous-time third-order sigma-delta modulator. Journal of Semiconductors, 2009, 30(12):125011 doi: 10.1088/1674-4926/30/12/125011
[13]
Song T Y, Cao Z H, L Yan S. A 2.7-mW 2-MHz continuous-time Σ Δ modulator with a hybrid active-passive loop filter. IEEE J Solid-State Circuits, 2008, 43(2):330 doi: 10.1109/JSSC.2007.914258
[14]
Grilo J, Galton I, Wang K, et al. A 12-mW ADC delta-sigma modulator with 80 dB of dynamic range integrated in a single-chip Bluetooth transceiver. IEEE J Solid-State Circuits, 2002, 37(3):271 doi: 10.1109/4.987077
Fig. 1.  Traditional direct conversion receiver architecture

Fig. 2.  CT $\Sigma \Delta $ modulator architecture

Fig. 3.  Noise transfer function (NTF) and signal transfer function (STF) plot

Fig. 4.  The modulator's top Level of the implementation

Fig. 5.  SNDR for $-6$ dBFS input versus normalized time constant

Fig. 6.  Simulation results of SNDR versus clock jitter and quantizer delay. (a) SNDR for $-6$ dBFS input versus clock jitter. (b) SNDR for $-6$ dBFS input versus quantizer delay

Fig. 7.  (a) Op-amp schematic and (b) its differential mode small signal equivalent circuit

Fig. 8.  Frequency response of two op-amps

Fig. 9.  Quantizer in the modulator

Fig. 10.  Schematic of (a) the pre-amp and (b) the latch in the comparator

Fig. 11.  Schematic of (a) the DAC and (b) the low swing buffer

Fig. 12.  Transient simulation results of flash ADC and feedback DAC

Fig. 13.  Illustration of DWA

Fig. 14.  Block diagram of DWA

Fig. 15.  Tunable capacitor array

Fig. 16.  Die photograph of the modulator

Fig. 17.  Measured output spectrum of the modulator with 75.8 kHz and -4 dBFS input signal

Fig. 18.  Measured SNDR versus input signal magnitude

Fig. 19.  Harmonic distortion test with 75.8 kHz and $-4$ dBFS input signal

Fig. 20.  Two-tone intermodulation test (input frequencies: 310 kHz and 330 kHz

Table 1.   Coefficient value of the $\Sigma \Delta $ modulator

Table 2.   Performance comparison with other related works

[1]
Breems L J, van der Zwan E J, Dijkmans E C, et al. A 1.8 mW CMOS sigma delta modulator with integrated mixer for A/D conversion of IF signals. IEEE J Solid-State Circuits, 2000, 35(4):468 doi: 10.1109/4.839907
[2]
Van der Zwan E J, Philips K, Bastiaansen C A A. A 10.7-MHz IF-to-baseband sigma delta A/D conversion system for AM/FM radio receivers. IEEE J Solid-State Circuits, 2000, 35(12):1810 doi: 10.1109/4.890294
[3]
Silva P, Breems L J, Makinwa K, et al. A 118 dB DR CT IF-to-baseband Σ Δ modulator for AM/FM/IBOC radio receivers. IEEE ISSCC Dig Tech Papers, 2006:66
[4]
Breems L J, Rutten R, van Veldhoven R, et al. A 56 mW CT quadrature cascaded sigma delta modulator with 77 dB DR in a near zero-IF 20 MHz band. IEEE ISSCC Dig Tech Papers, 2007:238
[5]
Paton S, Giandomenico A D, Hernandez L, et al. A 70-mW 300-MHz CMOS continuous-time sigma delta ADC with 15-MHz bandwidth and 11 bits of resolution. IEEE J Solid-State Circuits, 2004, 39(7):1056 doi: 10.1109/JSSC.2004.829925
[6]
Mitteregger G, Ebner C, Mechnig S, et al. A 20-mW 640-MHz CMOS continuous-time sigma-delta ADC with 20-MHz signal bandwidth, 80-dB dynamic range and 12-bit ENOB. IEEE J Solid-State Circuits, 2006, 41(12):2641 doi: 10.1109/JSSC.2006.884332
[7]
Schoofs R, Steyaert M S J, Sanse W M C. A design-optimized continuous-time delta-sigma ADC for WLAN applications. IEEE Trans Circuits Syst I, 2007, 54(1):209 doi: 10.1109/TCSI.2006.887455
[8]
Li Z M, Fiez T S. A 14 bit continuous-time delta-sigma A/D modulator with 2.5 MHz signal bandwidth. IEEE J Solid-State Circuits, 2007, 42(9):1873 doi: 10.1109/JSSC.2007.903086
[9]
Yan S L, Sanchez-Sinencio E. A continuous-time Σ Δ modulator with 88-dB dynamic range and 1.1-MHz signal bandwidth. IEEE J Solid-State Circuits, 2004, 39(1):75 doi: 10.1109/JSSC.2003.820856
[10]
Gong Zhen, Chen Bei, Hu Xueqing, et al. A low power 8th order elliptic low-pass filter for a CMMB tuner. Journal of Semiconductors, 2011, 32(9):095002 doi: 10.1088/1674-4926/32/9/095002
[11]
Li Ran, Li Jing, Yi Ting, et al. A 18-mW, 20-MHz bandwidth, 12-bit continuous-time Σ Δ modulator using a power-efficient multi-stage amplifier. Journal of Semiconductors, 2012, 33(1):015007 doi: 10.1088/1674-4926/33/1/015007
[12]
Li Yuanwen, Qi Da, Dong Yifeng, et al. A 1-V 60-μW 85-dB dynamic range continuous-time third-order sigma-delta modulator. Journal of Semiconductors, 2009, 30(12):125011 doi: 10.1088/1674-4926/30/12/125011
[13]
Song T Y, Cao Z H, L Yan S. A 2.7-mW 2-MHz continuous-time Σ Δ modulator with a hybrid active-passive loop filter. IEEE J Solid-State Circuits, 2008, 43(2):330 doi: 10.1109/JSSC.2007.914258
[14]
Grilo J, Galton I, Wang K, et al. A 12-mW ADC delta-sigma modulator with 80 dB of dynamic range integrated in a single-chip Bluetooth transceiver. IEEE J Solid-State Circuits, 2002, 37(3):271 doi: 10.1109/4.987077
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    Received: 10 February 2014 Revised: 08 May 2014 Online: Published: 01 October 2014

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      Mingyi Chen, Liguo Zhou, Chenghao Bian, Jun Yan, Yin Shi. A 2.52-mW continuous-time Σ Δ modulator with 72 dB dynamic range for FM radio[J]. Journal of Semiconductors, 2014, 35(10): 105004. doi: 10.1088/1674-4926/35/10/105004 M Y Chen, L G Zhou, C H Bian, J Yan, Y Shi. A 2.52-mW continuous-time Σ Δ modulator with 72 dB dynamic range for FM radio[J]. J. Semicond., 2014, 35(10): 105004. doi: 10.1088/1674-4926/35/10/105004.Export: BibTex EndNote
      Citation:
      Mingyi Chen, Liguo Zhou, Chenghao Bian, Jun Yan, Yin Shi. A 2.52-mW continuous-time Σ Δ modulator with 72 dB dynamic range for FM radio[J]. Journal of Semiconductors, 2014, 35(10): 105004. doi: 10.1088/1674-4926/35/10/105004

      M Y Chen, L G Zhou, C H Bian, J Yan, Y Shi. A 2.52-mW continuous-time Σ Δ modulator with 72 dB dynamic range for FM radio[J]. J. Semicond., 2014, 35(10): 105004. doi: 10.1088/1674-4926/35/10/105004.
      Export: BibTex EndNote

      A 2.52-mW continuous-time Σ Δ modulator with 72 dB dynamic range for FM radio

      doi: 10.1088/1674-4926/35/10/105004
      Funds:

      the National Science and Technology Major Project 10ZX02305-013-004

      Project supported by the National Science and Technology Major Project (No. 10ZX02305-013-002/10ZX02305-013-004)

      the National Science and Technology Major Project 10ZX02305-013-002

      More Information
      • Corresponding author: Chen Mingyi, Email:tjucmy@126.com
      • Received Date: 2014-02-10
      • Revised Date: 2014-05-08
      • Published Date: 2014-10-01

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