SEMICONDUCTOR INTEGRATED CIRCUITS

Design and implementation of IEEE 802.11ac MAC controller in 65 nm CMOS process

Peng Cheng, Bin Wu and Yong Hei

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 Corresponding author: Cheng Peng, Email:zxnmsk@126.com

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Abstract: An IEEE-802.11ac-1*1 wireless LAN system-on-a-chip (SoC) that integrates an analog front end, a digital base-band processor and a media access controller has been implemented in 65 nm CMOS technology. It can provide significantly increased throughput, high efficiency rate selection, and fully backward compatibility with the existing 802.11a/n WLAN protocols. Especially the measured maximum throughput of UDP traffic can be up to 267 Mbps.

Key words: SoC802.11acMACrate selection



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Fig. 1.  Construction of A-MSDU/A-MPDU architecture.

Fig. 2.  5-layer TCP/IP protocol mapping

Fig. 3.  Low MAC architecture

Fig. 4.  Interaction of hardware and software.

Fig. 5.  Aggregation implement

Fig. 6.  F-RBAR algorithm architecture.

Fig. 7.  Modelsim simulation result

Fig. 8.  FPGA phototype

Fig. 9.  802.11a/n/ac chip layout

Fig. 10.  Throughput verify system.

Fig. 11.  Throughput without aggregation

Fig. 12.  Throughput with AMSDU/AMPDU

Fig. 13.  Rate adaption test system

Fig. 14.  Throughput of rate algorithm.

Table 1.   RTS/CTS Scramble field format.

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    Received: 09 June 2015 Revised: Online: Published: 01 February 2016

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      Peng Cheng, Bin Wu, Yong Hei. Design and implementation of IEEE 802.11ac MAC controller in 65 nm CMOS process[J]. Journal of Semiconductors, 2016, 37(2): 025002. doi: 10.1088/1674-4926/37/2/025002 P Cheng, B Wu, Y Hei. Design and implementation of IEEE 802.11ac MAC controller in 65 nm CMOS process[J]. J. Semicond., 2016, 37(2): 025002. doi: 10.1088/1674-4926/37/2/025002.Export: BibTex EndNote
      Citation:
      Peng Cheng, Bin Wu, Yong Hei. Design and implementation of IEEE 802.11ac MAC controller in 65 nm CMOS process[J]. Journal of Semiconductors, 2016, 37(2): 025002. doi: 10.1088/1674-4926/37/2/025002

      P Cheng, B Wu, Y Hei. Design and implementation of IEEE 802.11ac MAC controller in 65 nm CMOS process[J]. J. Semicond., 2016, 37(2): 025002. doi: 10.1088/1674-4926/37/2/025002.
      Export: BibTex EndNote

      Design and implementation of IEEE 802.11ac MAC controller in 65 nm CMOS process

      doi: 10.1088/1674-4926/37/2/025002
      Funds:

      Project supported by the National Great Specific Project of China (No. 2012ZX03004004_001).

      More Information
      • Corresponding author: Cheng Peng, Email:zxnmsk@126.com
      • Received Date: 2015-06-09
      • Accepted Date: 2015-08-18
      • Published Date: 2016-01-25

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