Chin. J. Semicond. > 2007, Volume 28 > Issue 3 > 398-403

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An AND-LUT Based Hybrid FPGA Architecture

Chen Liguang, Lai Jinmei and Tong Jiarong

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Abstract: A new hybrid FPGA architecture is proposed.The logic tile,which consists of a logic cluster and related connection boxes (CBs),can be configured as either programmable logic arrays (PLAs) or look-up tables (LUTs).This architecture can be classified as an AND-LUT array.PLAs are suitable for the implementation of high fan-in logic circuits,while LUTs are used to implement low fan-in logic circuits.As a result,the proposed hybrid FPGA architecture (HFA) is more flexible to improve logic density.Experiments based on MCNC benchmark circuits were performed in both the hybrid architecture and conventional LUT-based symmetrical FPGA architecture in term of area consumption.Preliminary results indicate that on average,the area is reduced by 46% using the new hybrid architecture.

Key words: hybrid FPGAAND-LUT arrayAND-OR arrayPLALUT

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    Received: 18 August 2015 Revised: 10 October 2006 Online: Published: 01 March 2007

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      Chen Liguang, Lai Jinmei, Tong Jiarong. An AND-LUT Based Hybrid FPGA Architecture[J]. Journal of Semiconductors, 2007, In Press. Chen L G, Lai J M, Tong J R. An AND-LUT Based Hybrid FPGA Architecture[J]. Chin. J. Semicond., 2007, 28(3): 398.Export: BibTex EndNote
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      Chen Liguang, Lai Jinmei, Tong Jiarong. An AND-LUT Based Hybrid FPGA Architecture[J]. Journal of Semiconductors, 2007, In Press.

      Chen L G, Lai J M, Tong J R. An AND-LUT Based Hybrid FPGA Architecture[J]. Chin. J. Semicond., 2007, 28(3): 398.
      Export: BibTex EndNote

      An AND-LUT Based Hybrid FPGA Architecture

      • Received Date: 2015-08-18
      • Accepted Date: 2006-08-03
      • Revised Date: 2006-10-10
      • Published Date: 2007-03-06

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