| Citation: |
Long Shanli, Shi Longxing, Wu Jianhui, Wang Pei. A 1.8V 10bit 100Msps Pipelined Analog to Digital Converter[J]. Journal of Semiconductors, 2008, In Press.
Long S L, Shi L X, Wu J H, Wang P. A 1.8V 10bit 100Msps Pipelined Analog to Digital Converter[J]. J. Semicond., 2008, 29(5): 923.
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A 1.8V 10bit 100Msps Pipelined Analog to Digital Converter
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Abstract
A novel low-voltage,low constant-impedance switch is proposed,which not only eliminates the parasitic capacitor but also reduces the variation of switch "on" resistance.With the gain-boost technology,the operational transconductance amplifier used in this analog-to-digital converter (ADC) achieves enough DC gain and unity-gain frequency under the low voltage supply and to guarantee the performance of the sample and hold circuit (S/H) and the sub-stages.Based on these methods,a 10bit 100Msps pipelined ADC is fabricated in a 0.18μm CMOS process and operates under a 1.8V voltage supply.The ADC achieves an SNR of 54.2dB (input frequency of 6.26MHz) and an SNR of 49.8dB (input frequency of 48.96MHz) when the sampling frequency is 100MHz. -
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