Chin. J. Semicond. > 2002, Volume 23 > Issue 12 > 1332-1337

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可综合算术运算单元的性能建模及VLSI结构优化

沈泊 and 章倩苓

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Key words: 单位门模型, 性能评估, 加法器

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    History

    Received: 19 August 2015 Revised: Online: Published: 01 December 2002

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      • Received Date: 2015-08-19

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