| Citation: |
Xue Hong, Li Zhiqun, Wang Zhigong, Li Wei, Zhang Li. A Charge Pump Design for Low-Spur PLL[J]. Journal of Semiconductors, 2007, In Press.
Xue H, Li Z Q, Wang Z G, Li W, Zhang L. A Charge Pump Design for Low-Spur PLL[J]. Chin. J. Semicond., 2007, 28(12): 1988.
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A Charge Pump Design for Low-Spur PLL
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Abstract
A charge-pump circuit that can be used in PLL is achieved through a TSMC 0.18μm CMOS process.Conventional CMOS charge pump circuits have large current mismatch.The current mismatch can generate a phase offset,which increases spurs in PLL outputs and reduces the locking range.An operational amplifier, self-biasing cascode current mirror, and supply-independent reference current source are used to make the charge and discharge current match.Measurement results show that the charge pump current is 0.475mA and the current mismatch is less than 10mA in the output voltage range of 0.3~1.6V,with power consumption of 6.8mW at 1.8V. -
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