J. Semicond. > 2008, Volume 29 > Issue 2 > 381-386

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EOS Failure Analysis and Die Attach Optimization

Wu Dinghe, Shen Meng, Shao Xuefeng and Yu Hongkun

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Abstract: To investigate the influence of electrical overstress (EOS) on the reliability of power MOSFETs, failure analysis is employed to assess the reliability of devices, including defects related to solder void, gate openings, and die cracks.After using finite element analysis, a circuit simulation, and a reliability accelerated test, the root cause of EOS is confirmed.EOS resistance of the devices after optimizing the die attach temperature-time curve is compared with that of the devices before the optimization using unclamped inductive loading test.The volume of solder void is observably decreased and EOS resistance is improved after optimization.

Key words: EOSfailure analysisMOSFETdie attachprocess optimization

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    Received: 18 August 2015 Revised: 11 September 2007 Online: Published: 01 February 2008

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      Wu Dinghe, Shen Meng, Shao Xuefeng, Yu Hongkun. EOS Failure Analysis and Die Attach Optimization[J]. Journal of Semiconductors, 2008, In Press. Wu D H, Shen M, Shao X F, Yu H K. EOS Failure Analysis and Die Attach Optimization[J]. J. Semicond., 2008, 29(2): 381.Export: BibTex EndNote
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      Wu Dinghe, Shen Meng, Shao Xuefeng, Yu Hongkun. EOS Failure Analysis and Die Attach Optimization[J]. Journal of Semiconductors, 2008, In Press.

      Wu D H, Shen M, Shao X F, Yu H K. EOS Failure Analysis and Die Attach Optimization[J]. J. Semicond., 2008, 29(2): 381.
      Export: BibTex EndNote

      EOS Failure Analysis and Die Attach Optimization

      • Received Date: 2015-08-18
      • Accepted Date: 2007-07-23
      • Revised Date: 2007-09-11
      • Published Date: 2008-01-31

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