SEMICONDUCTOR INTEGRATED CIRCUITS

80 Gb/s 2 : 1 multiplexer in 0.13-µm SiGe BiCMOS technology

Zhao Yan, Wang Zhigong and Li Wei

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Abstract: This work presents an ultra-high speed 2 : 1 multiplexer (MUX) in a SiGe BiCMOS technology with fT = 103 GHz. To boost the operating speed, the system scheme is optimized including a 2 : 1 selector circuit directly driving an external 50 W load, and two wide-band data buffers and one clock buffer in the input stage. The chip exhibited an open eye at 80 Gb/s with a 160 mV single-ended voltage swing.

Key words: Gilbert cell

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    Received: 18 August 2015 Revised: 22 September 2008 Online: Published: 01 February 2009

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      Zhao Yan, Wang Zhigong, Li Wei. 80 Gb/s 2 : 1 multiplexer in 0.13-µm SiGe BiCMOS technology[J]. Journal of Semiconductors, 2009, 30(2): 025008. doi: 10.1088/1674-4926/30/2/025008 Zhao Y, Wang Z G, Li W. 80 Gb/s 2 : 1 multiplexer in 0.13-µm SiGe BiCMOS technology[J]. J. Semicond., 2009, 30(2): 025008. doi:  10.1088/1674-4926/30/2/025008.Export: BibTex EndNote
      Citation:
      Zhao Yan, Wang Zhigong, Li Wei. 80 Gb/s 2 : 1 multiplexer in 0.13-µm SiGe BiCMOS technology[J]. Journal of Semiconductors, 2009, 30(2): 025008. doi: 10.1088/1674-4926/30/2/025008

      Zhao Y, Wang Z G, Li W. 80 Gb/s 2 : 1 multiplexer in 0.13-µm SiGe BiCMOS technology[J]. J. Semicond., 2009, 30(2): 025008. doi:  10.1088/1674-4926/30/2/025008.
      Export: BibTex EndNote

      80 Gb/s 2 : 1 multiplexer in 0.13-µm SiGe BiCMOS technology

      doi: 10.1088/1674-4926/30/2/025008
      • Received Date: 2015-08-18
      • Accepted Date: 2008-08-11
      • Revised Date: 2008-09-22
      • Published Date: 2009-02-16

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