SEMICONDUCTOR TECHNOLOGY

Overlay mark optimization for thick-film resist overlay metrology

Zhu Liang, Li Jie, Zhou Congshu, Gu Yili and Yang Huayue

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Abstract: For thick resist implant layers, such as a high voltage P well and a deep N well, systematic and uncor-rectable overlay residues brought about by the tapered resist profiles were found. It was found that the tapered profile is closely related to the pattern density. Potential solutions of the manufacturing problem include hardening the film solidness or balancing the exposure density. In this paper, instead of focusing on the process change methodology, we intend to solve the issue of the overlay metrology error from the perspective of the overlay mark design. Based on the comparison of the overlay performances between the proposed overlay mark and the original design, it is shown that the optimized overlay mark target achieves better performance in terms of profiles, dynamic precision, tool induced shift (TIS), and residues. Furthermore, five types of overlay marks with dummy bars are studied, and a recommendation for the overlay marks is given.

Key words: overlay metrology error dynamic precision tool induced shift statistical process control depth of focus exposure latitude

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    Received: 18 August 2015 Revised: 20 January 2009 Online: Published: 01 June 2009

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      Zhu Liang, Li Jie, Zhou Congshu, Gu Yili, Yang Huayue. Overlay mark optimization for thick-film resist overlay metrology[J]. Journal of Semiconductors, 2009, 30(6): 066002. doi: 10.1088/1674-4926/30/6/066002 Zhu L, Li J, Zhou C S, Gu Y L, Yang H Y. Overlay mark optimization for thick-film resist overlay metrology[J]. J. Semicond., 2009, 30(6): 066002. doi: 10.1088/1674-4926/30/6/066002.Export: BibTex EndNote
      Citation:
      Zhu Liang, Li Jie, Zhou Congshu, Gu Yili, Yang Huayue. Overlay mark optimization for thick-film resist overlay metrology[J]. Journal of Semiconductors, 2009, 30(6): 066002. doi: 10.1088/1674-4926/30/6/066002

      Zhu L, Li J, Zhou C S, Gu Y L, Yang H Y. Overlay mark optimization for thick-film resist overlay metrology[J]. J. Semicond., 2009, 30(6): 066002. doi: 10.1088/1674-4926/30/6/066002.
      Export: BibTex EndNote

      Overlay mark optimization for thick-film resist overlay metrology

      doi: 10.1088/1674-4926/30/6/066002
      • Received Date: 2015-08-18
      • Accepted Date: 2008-10-08
      • Revised Date: 2009-01-20
      • Published Date: 2009-07-13

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