SEMICONDUCTOR INTEGRATED CIRCUITS

Full on-chip and area-efficient CMOS LDO with zero to maximum load stability using adaptive frequency compensation

Ma Haifeng and Zhou Feng

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Abstract: A full on-chip and area-efficient low-dropout linear regulator (LDO) is presented. By using the proposed adaptive frequency compensation (AFC) technique, full on-chip integration is achieved without compromising the LDO's stability in the full output current range. Meanwhile, the use of a compact pass transistor (the compact pass transistor serves as the gain fast roll-off output stage in the AFC technique) has enabled the LDO to be very area-efficient. The proposed LDO is implemented in standard 0.35 μm CMOS technology and occupies an active area as small as 220×320 μm2, which is a reduction to 58% compared to state-of-the-art designs using technologies with the same feature size. Measurement results show that the LDO can deliver 0–60 mA output current with 54 μA quiescent current consumption and the regulated output voltage is 1.8 V with an input voltage range from 2 to 3.3 V.

Key words: low-dropout regulator frequency compensation full on-chip system-on-chip

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    Received: 18 August 2015 Revised: 30 August 2009 Online: Published: 01 January 2010

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      Ma Haifeng, Zhou Feng. Full on-chip and area-efficient CMOS LDO with zero to maximum load stability using adaptive frequency compensation[J]. Journal of Semiconductors, 2010, 31(1): 015006. doi: 10.1088/1674-4926/31/1/015006 Ma H F, Zhou F. Full on-chip and area-efficient CMOS LDO with zero to maximum load stability using adaptive frequency compensation[J]. J. Semicond., 2010, 31(1): 015006. doi:  10.1088/1674-4926/31/1/015006.Export: BibTex EndNote
      Citation:
      Ma Haifeng, Zhou Feng. Full on-chip and area-efficient CMOS LDO with zero to maximum load stability using adaptive frequency compensation[J]. Journal of Semiconductors, 2010, 31(1): 015006. doi: 10.1088/1674-4926/31/1/015006

      Ma H F, Zhou F. Full on-chip and area-efficient CMOS LDO with zero to maximum load stability using adaptive frequency compensation[J]. J. Semicond., 2010, 31(1): 015006. doi:  10.1088/1674-4926/31/1/015006.
      Export: BibTex EndNote

      Full on-chip and area-efficient CMOS LDO with zero to maximum load stability using adaptive frequency compensation

      doi: 10.1088/1674-4926/31/1/015006
      • Received Date: 2015-08-18
      • Accepted Date: 2009-06-30
      • Revised Date: 2009-08-30
      • Published Date: 2009-12-29

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