Abstract: A carrier stored trench-gate bipolar transistor (CSTBT) with a p-floating layer (PF-CSTBT) is proposed. Due to the p-floating layer, the thick and highly doped carrier stored layer can be induced, and the conductivity modulation effect will be enhanced near the emitter. The accumulation resistance and the spreading resistance are reduced. The on-state loss will be much lower than in a conventional CSTBT. With the p-floating layer, the distribution of electric fields of the conventional IGBT is reformed, and the breakdown voltage is remarkably improved. The simulation results have shown that the forward voltage drop (VCE-on) of the novel structure is reduced by 20% and 17% respectively, compared with the conventional trench IGBT (TIGBT) and CSTBT under the same conditions. Moreover, an increment of more than 100 V of the breakdown voltage is achieved without sacrificing the SCSOA (short circuit safety operation area) compared with the conventional TIGBT.

Key words: p-floating layer