Diagram representations of charge pumping processes in CMOS transistors

Huang Xinyun; Jiao Guangfan; Shen Chen; Cao Wei; Huang Daming; Li Mingfu

doi:10.1088/1674-4926/31/8/084003

Article Navigation > Journal of Semiconductors > 2010 > 31(8): 084003

Huang Xinyun, Jiao Guangfan, Shen Chen, Cao Wei, Huang Daming, Li Mingfu. Diagram representations of charge pumping processes in CMOS transistors[J]. Journal of Semiconductors, 2010, 31(8): 084003. doi: 10.1088/1674-4926/31/8/084003 Huang X Y, Jiao G F, Shen C, Cao W, Huang D M, Li M F. Diagram representations of charge pumping processes in CMOS transistors[J]. J. Semicond., 2010, 31(8): 084003. doi: 10.1088/1674-4926/31/8/084003.Export: BibTex EndNote

Citation:

Huang Xinyun, Jiao Guangfan, Shen Chen, Cao Wei, Huang Daming, Li Mingfu. Diagram representations of charge pumping processes in CMOS transistors[J]. Journal of Semiconductors, 2010, 31(8): 084003. doi: 10.1088/1674-4926/31/8/084003

Huang X Y, Jiao G F, Shen C, Cao W, Huang D M, Li M F. Diagram representations of charge pumping processes in CMOS transistors[J]. J. Semicond., 2010, 31(8): 084003. doi: 10.1088/1674-4926/31/8/084003.

Export: BibTex EndNote

Citation:

Export: BibTex EndNote

PDF( 906 KB)

Diagram representations of charge pumping processes in CMOS transistors

doi: 10.1088/1674-4926/31/8/084003

State Key Laboratory of ASIC & System, Department of Microelectronics, Fudan University, Shanghai 201203, China
State Key Laboratory of ASIC & System, Department of Microelectronics, Fudan University, Shanghai 201203, China
SNDL, ECE Department, National University of Singapore, Singapore 117576, Singapore
State Key Laboratory of ASIC & System, Department of Microelectronics, Fudan University, Shanghai 201203, China
State Key Laboratory of ASIC & System, Department of Microelectronics, Fudan University, Shanghai 201203, China
State Key Laboratory of ASIC & System, Department of Microelectronics, Fudan University, Shanghai 201203, China
SNDL, ECE Department, National University of Singapore, Singapore 117576, Singapore

Funds:

高校基金

Received Date: 2015-08-18
Accepted Date: 2010-01-07
Revised Date: 2010-03-31
Published Date: 2010-07-31

Abstract

Abstract

A diagram representation method is proposed to interpret the complicated charge pumping (CP) processes. The fast and slow traps in CP measurement are defined. Some phenomena such as CP pulse rise/fall time dependence, frequency dependence, the voltage dependence for the fast and slow traps, and the geometric CP component are clearly illustrated at a glance by the diagram representation. For the slow trap CP measurement, there is a transition stage and a steady stage due to the asymmetry of the electron and hole capture, and the CP current is determined by the lower capturing electron or hole component. The method is used to discuss the legitimacy of the newly developed modified charge pumping method.
- charge pumping

FullText(HTML)

References(0)

References

Diagram representations of charge pumping processes in CMOS transistors

Search

GET CITATION

Share:

Article Metrics

History

Catalog

Email This Article

Diagram representations of charge pumping processes in CMOS transistors

doi: 10.1088/1674-4926/31/8/084003

Abstract

References

Proportional views

Catalog

Diagram representations of charge pumping processes in CMOS transistors

Search

GET CITATION

Share:

Article Metrics

History

Catalog

Email This Article

Diagram representations of charge pumping processes in CMOS transistors

doi: 10.1088/1674-4926/31/8/084003

Abstract

References

Proportional views

Catalog

Export File

Citation

Format

Content