| Citation: |
Jiang Lingli, Zhang Bo, Fan Hang, Qiao Ming, Li Zhaoji. ESD robustness studies on the double snapback characteristics of an LDMOS with an embedded SCR[J]. Journal of Semiconductors, 2011, 32(9): 094002. doi: 10.1088/1674-4926/32/9/094002
Jiang L L, Zhang B, Fan H, Qiao M, Li Z J. ESD robustness studies on the double snapback characteristics of an LDMOS with an embedded SCR[J]. J. Semicond., 2011, 32(9): 094002. doi: 10.1088/1674-4926/32/9/094002.
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ESD robustness studies on the double snapback characteristics of an LDMOS with an embedded SCR
doi: 10.1088/1674-4926/32/9/094002
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Abstract
Criterion for the second snapback of an LDMOS with an embedded SCR is given based on parasitic parameter analysis. According to this criterion, three typical structures are compared by numerical simulation and structural parameters which influence the second snapback are also analyzed to optimize the ESD characteristics. Experimental data showed that, as the second snapback voltage decreased from 25.4 to 8.1 V, the discharge ability of the optimized structure increased from 0.57 to 3.1 A.-
Keywords:
- ESD,
- LDMOS,
- SCR,
- double snapback
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References
[1] [2] [3] [4] [5] [6] -
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