SEMICONDUCTOR INTEGRATED CIRCUITS

The investigation on sensitive mapping of memory cell in microprocessor

Chunqing Yu1, , Long Fan1, Suge Yue1, 2, Maoxin Chen1, Shougang Du1 and Hongchao Zheng1

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 Corresponding author: Yu Chunqing, Email: yuchunqing2006@163.com

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Abstract: The single event effects of the sensitivity of a circuit are investigated on a 32-bit microprocessor with a five-stage instruction pipeline by pulsed laser test. The investigation on sensitive mapping of the memory cell is illustrated and then the comparison between the sensitive mapping and the layout of the circuit is made. A comparison result indicates that the area of the sensitive node in sensitive mapping is just the location of the drain in the layout. Therefore, SEE sensitivity in sensitive mapping fits well with that in the physical layout of functional units, which can directly and objectively indicate the size and distribution of sensitive areas. The investigation of sensitive mapping is a meaningful way to verify the hardened effect and provide a reference for improving hardened design by combining with the physical layout.

Key words: single event effectsmemory cellsmicroprocessorsensitive mapping



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Fig. 1.  Architecture of the microprocessor.

Fig. 2.  Laser test facility.

Fig. 3.  Flowchart of investigation on sensitive mapping.

Fig. 4.  (Color online) SEU Sensitivity mapping of cache memory cell.

Fig. 5.  (Color online) Layout of Cache memory cell.

Fig. 6.  (Color online) SEU sensitivity mapping of register memory cell.

Fig. 7.  Layout of register memory cell.

Table 1.   Correspondence of sensitive node size between layout and sensitive mapping in Cache memory cell.

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Table 2.   The correspondence of sensitive node size between layout and sensitive mapping in register memory cell.

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    Received: 11 June 2015 Revised: Online: Published: 01 November 2015

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      Chunqing Yu, Long Fan, Suge Yue, Maoxin Chen, Shougang Du, Hongchao Zheng. The investigation on sensitive mapping of memory cell in microprocessor[J]. Journal of Semiconductors, 2015, 36(11): 115004. doi: 10.1088/1674-4926/36/11/115004 C Q Yu, L Fan, S G Yue, M X Chen, S G Du, H C Zheng. The investigation on sensitive mapping of memory cell in microprocessor[J]. J. Semicond., 2015, 36(11): 115004. doi: 10.1088/1674-4926/36/11/115004.Export: BibTex EndNote
      Citation:
      Chunqing Yu, Long Fan, Suge Yue, Maoxin Chen, Shougang Du, Hongchao Zheng. The investigation on sensitive mapping of memory cell in microprocessor[J]. Journal of Semiconductors, 2015, 36(11): 115004. doi: 10.1088/1674-4926/36/11/115004

      C Q Yu, L Fan, S G Yue, M X Chen, S G Du, H C Zheng. The investigation on sensitive mapping of memory cell in microprocessor[J]. J. Semicond., 2015, 36(11): 115004. doi: 10.1088/1674-4926/36/11/115004.
      Export: BibTex EndNote

      The investigation on sensitive mapping of memory cell in microprocessor

      doi: 10.1088/1674-4926/36/11/115004
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      • Corresponding author: Yu Chunqing, Email: yuchunqing2006@163.com
      • Received Date: 2015-06-11
      • Accepted Date: 2015-07-23
      • Published Date: 2015-01-25

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