SEMICONDUCTOR INTEGRATED CIRCUITS

A high linearity current mode second IF CMOS mixer for a DRM/DAB receiver

Jian Xu1, , Zheng Zhou1, Yiqiang Wu1, Zhigong Wang1 and Jianping Chen2

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 Corresponding author: Jian Xu, E-mail: xujian318@seu.edu.cn

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Abstract: A passive current switch mixer was designed for the second IF down-conversion in a DRM/DAB receiver. The circuit consists of an input transconductance stage, a passive current switching stage, and a current amplifier stage. The input transconductance stage employs a self-biasing current reusing technique, with a resistor shunt feedback to increase the gain and output impedance. A dynamic bias technique is used in the switching stage to ensure the stability of the overdrive voltage versus the PVT variations. A current shunt feedback is introduced to the conventional low-voltage second-generation fully balanced multi-output current converter (FBMOCCII), which provides very low input impedance and high output impedance. With the circuit working in current mode, the linearity is effectively improved with low supply voltages. Especially, the transimpedance stage can be removed, which simplifies the design considerably. The design is verified with a SMIC 0.18 μ m RF CMOS process. The measurement results show that the voltage conversation gain is 1.407 dB, the NF is 16.22 dB, and the IIP3 is 4.5 dBm, respectively. The current consumption is 9.30 mA with a supply voltage of 1.8 V. This exhibits a good compromise among the gain, noise, and linearity for the second IF mixer in DRM/DAB receivers.

Key words: CMOSRFcurrent modepassive current switching mixerFBMOCCIIDRMDAB



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Fig. 1.  Diagram of the proposed mixer.

Fig. 2.  The current reuse amplifier with resistor shunt feedback.

Fig. 3.  The equivalent small signal half circuit model.

Fig. 4.  Dynamic bias switching stage.

Fig. 5.  The current amplifier.

Fig. 6.  FBMOCCII (fully balanced multi-output current converter).

Fig. 7.  The multiple output current conveyor (MOCCII).

Fig. 8.  (a) The input impedance of X-port. (b) The output impedance of $Z_{2}$ port.

Fig. 9.  A photograph of the chip.

Fig. 10.  Conversion gain versus frequency.

Fig. 11.  IIP3 of the mixer.

Table 1.   A performance summary of the mixer.

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    Received: 11 September 2014 Revised: Online: Published: 01 May 2015

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      Jian Xu, Zheng Zhou, Yiqiang Wu, Zhigong Wang, Jianping Chen. A high linearity current mode second IF CMOS mixer for a DRM/DAB receiver[J]. Journal of Semiconductors, 2015, 36(5): 055003. doi: 10.1088/1674-4926/36/5/055003 J Xu, Z Zhou, Y Q Wu, Z G Wang, J P Chen. A high linearity current mode second IF CMOS mixer for a DRM/DAB receiver[J]. J. Semicond., 2015, 36(5): 055003. doi: 10.1088/1674-4926/36/5/055003.Export: BibTex EndNote
      Citation:
      Jian Xu, Zheng Zhou, Yiqiang Wu, Zhigong Wang, Jianping Chen. A high linearity current mode second IF CMOS mixer for a DRM/DAB receiver[J]. Journal of Semiconductors, 2015, 36(5): 055003. doi: 10.1088/1674-4926/36/5/055003

      J Xu, Z Zhou, Y Q Wu, Z G Wang, J P Chen. A high linearity current mode second IF CMOS mixer for a DRM/DAB receiver[J]. J. Semicond., 2015, 36(5): 055003. doi: 10.1088/1674-4926/36/5/055003.
      Export: BibTex EndNote

      A high linearity current mode second IF CMOS mixer for a DRM/DAB receiver

      doi: 10.1088/1674-4926/36/5/055003
      Funds:

      Project supported by the National Natural Science Foundation of China (No.61306069), and the National High Technology Research and Development Program of China (No.2011AA010301).

      More Information
      • Corresponding author: E-mail: xujian318@seu.edu.cn
      • Received Date: 2014-09-11
      • Accepted Date: 2014-11-25
      • Published Date: 2015-01-25

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