J. Semicond. > 2008, Volume 29 > Issue 11 > 2232-2237

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A 3V 5.88mW 13b 400kHz Sigma-Delta Modulator with 84dB Dynamic

Li Zhuo and Yang Huazhong

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Abstract: This paper introduces a high-revolution,200kHz signal bandwidth ΣΔ modulator for low-IF GSM receivers that adopts a 2-1 cascaded single-bit structure to achieve high linearity and stability.Our design is realized in a standard 0.18μm CMOS process with an active area of 0.5mm×1.1mm.The ΣΔ modulator is driven by a single 192MHz clock signal and dissipates 5.88mW from 3V power supply.The experimental results show that,with an oversampling ratio of 48,the modulator achieves a 84.4dB dynamic range,73.8dB peak SNDR,and 80dB peak SNR in the signal bandwidth of 200kHz.

Key words: cascaded sigma-delta modulatoranalog-digital converterswitched-capacitor circuitsoperational amplifiersCMOS analog integrated circuits

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    Received: 18 August 2015 Revised: 16 July 2008 Online: Published: 01 November 2008

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      Li Zhuo, Yang Huazhong. A 3V 5.88mW 13b 400kHz Sigma-Delta Modulator with 84dB Dynamic[J]. Journal of Semiconductors, 2008, In Press. Li Z, Yang H Z. A 3V 5.88mW 13b 400kHz Sigma-Delta Modulator with 84dB Dynamic[J]. J. Semicond., 2008, 29(11): 2232.Export: BibTex EndNote
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      Li Zhuo, Yang Huazhong. A 3V 5.88mW 13b 400kHz Sigma-Delta Modulator with 84dB Dynamic[J]. Journal of Semiconductors, 2008, In Press.

      Li Z, Yang H Z. A 3V 5.88mW 13b 400kHz Sigma-Delta Modulator with 84dB Dynamic[J]. J. Semicond., 2008, 29(11): 2232.
      Export: BibTex EndNote

      A 3V 5.88mW 13b 400kHz Sigma-Delta Modulator with 84dB Dynamic

      • Received Date: 2015-08-18
      • Accepted Date: 2008-05-10
      • Revised Date: 2008-07-16
      • Published Date: 2008-11-11

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