J. Semicond. > 2008, Volume 29 > Issue 7 > 1298-1304

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A Σ-Δ Fractional-N PLL Frequency Synthesizer with AFC for SRD Applications

Zhang Huajiang, Hu Kangmin and Hong Zhiliang

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Abstract: A fractional-Nfrequency synthesizer for 433/868MHz SRD applications is implemented in a 0.35μm CMOS process.A wide-band VCO and an AFC are used to cover the desired bands.A 3bit third order sigma-delta modulator is adopted to reduce the out-band phase noise.The measurements show a VCO tuning range from 1.31 to 1.88GHz with AFC working correctly,an out-band phase noise of -139dBc/Hz at 3MHz offset frequency,and a fractional spur of less than -60dBc.The chip area is 1.5mm×1.2mm and the total current dissipation including LO buffers is 19mA from a single 3.0V supply voltage.

Key words: short range devicephase locked loopadaptive frequency calibrationfrequency synthesizersigma-delta

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    Received: 18 August 2015 Revised: 01 April 2008 Online: Published: 01 July 2008

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      Zhang Huajiang, Hu Kangmin, Hong Zhiliang. A Σ-Δ Fractional-N PLL Frequency Synthesizer with AFC for SRD Applications[J]. Journal of Semiconductors, 2008, In Press. Zhang H J, Hu K M, Hong Z L. A Σ-Δ Fractional-N PLL Frequency Synthesizer with AFC for SRD Applications[J]. J. Semicond., 2008, 29(7): 1298.Export: BibTex EndNote
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      Zhang Huajiang, Hu Kangmin, Hong Zhiliang. A Σ-Δ Fractional-N PLL Frequency Synthesizer with AFC for SRD Applications[J]. Journal of Semiconductors, 2008, In Press.

      Zhang H J, Hu K M, Hong Z L. A Σ-Δ Fractional-N PLL Frequency Synthesizer with AFC for SRD Applications[J]. J. Semicond., 2008, 29(7): 1298.
      Export: BibTex EndNote

      A Σ-Δ Fractional-N PLL Frequency Synthesizer with AFC for SRD Applications

      • Received Date: 2015-08-18
      • Accepted Date: 2008-01-04
      • Revised Date: 2008-04-01
      • Published Date: 2008-07-04

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