Modeling and Simulation of Hot-Carrier Degradation in Deep-Submicron pMOSFET’s

Li Kang; Hao Yue; Liu Hongxia; Fang Jianping; Xue Hongmin

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Article Navigation > Journal of Semiconductors > 2005 > 26(11): 2169-2174

Li Kang, Hao Yue, Liu Hongxia, Fang Jianping, Xue Hongmin. Modeling and Simulation of Hot-Carrier Degradation in Deep-Submicron pMOSFET’s[J]. Journal of Semiconductors, 2005, In Press. Li K, Hao Y, Liu H X, Fang J P, Xue H M. Modeling and Simulation of Hot-Carrier Degradation in Deep-Submicron pMOSFET’s[J]. Chin. J. Semicond., 2005, 26(11): 2169.Export: BibTex EndNote

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Li Kang, Hao Yue, Liu Hongxia, Fang Jianping, Xue Hongmin. Modeling and Simulation of Hot-Carrier Degradation in Deep-Submicron pMOSFET’s[J]. Journal of Semiconductors, 2005, In Press.

Li K, Hao Y, Liu H X, Fang J P, Xue H M. Modeling and Simulation of Hot-Carrier Degradation in Deep-Submicron pMOSFET’s[J]. Chin. J. Semicond., 2005, 26(11): 2169.

Export: BibTex EndNote

Citation:

Li Kang, Hao Yue, Liu Hongxia, Fang Jianping, Xue Hongmin. Modeling and Simulation of Hot-Carrier Degradation in Deep-Submicron pMOSFET’s[J]. Journal of Semiconductors, 2005, In Press.

Li K, Hao Y, Liu H X, Fang J P, Xue H M. Modeling and Simulation of Hot-Carrier Degradation in Deep-Submicron pMOSFET’s[J]. Chin. J. Semicond., 2005, 26(11): 2169.

Export: BibTex EndNote

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Modeling and Simulation of Hot-Carrier Degradation in Deep-Submicron pMOSFET’s

Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices,Microelectronics Institute,Xidian University,Xi’an 710071,China
Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices,Microelectronics Institute,Xidian University,Xi’an 710072,China
Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices,Microelectronics Institute,Xidian University,Xi’an 710073,China
Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices,Microelectronics Institute,Xidian University,Xi’an 710074,China
Department of Computer,Shanxi Institute of Education,Xi’an 710061,China

Received Date: 2015-08-19

Abstract

Abstract

A HCI (hot carrier injection) degradation model of DSM(deep submicron) pMOSFETs is studied.A physical description of a time-dependent gate current is given with a stream function analysis.Based on this model,the HCI degradation model of DSM pMOSFETs is updated.A kind of reliability simulation method for HCI degradation, based on the degradation model, is then proposed,which is used to predict the degree of HCI degradation of the devices under static stress.Analysis and comparisons of simulation results are also given.This kind of simulation method is used in XDRT tools for HCI reliability analysis of pMOSFET devices.
- HCI,
- time-dependent gate current,
- BSIM3v3,
- reliability simulation

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