Fig. 1.
The architecture of CSA readout circuit.
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| Citation: |
Shanli Long, Yan Liu, Kejun He, Xinggang Tang, Qian Chen. 116 dB dynamic range CMOS readout circuit for MEMS capacitive accelerometer[J]. Journal of Semiconductors, 2014, 35(9): 095004. doi: 10.1088/1674-4926/35/9/095004
S L Long, Y Liu, K J He, X G Tang, Q Chen. 116 dB dynamic range CMOS readout circuit for MEMS capacitive accelerometer[J]. J. Semicond., 2014, 35(9): 095004. doi: 10.1088/1674-4926/35/9/095004.
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116 dB dynamic range CMOS readout circuit for MEMS capacitive accelerometer
doi: 10.1088/1674-4926/35/9/095004
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Abstract
A high stability in-circuit reprogrammable technique control system for a capacitive MEMS accelerometer is presented. Modulation and demodulation are used to separate the signal from the low frequency noise. A low-noise low-offset charge integrator is employed in this circuit to implement a capacitance-to-voltage converter and minimize the noise and offset. The application-specific integrated circuit (ASIC) is fabricated in a 0.5 μm one-ploy three-metal CMOS process. The measured results of the proposed circuit show that the noise floor of the ASIC is -116 dBV, the sensitivity of the accelerometer is 66 mV/g with a nonlinearity of 0.5%. The chip occupies 3.5×2.5 mm2 and the current is 3.5 mA. -
References
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