| Citation: |
Li Xiaoming, Zhuang Yiqi, Zhang Li, Xin Weiping. Cost-Effective VDMOS and Compatible Process for PDP Scan-Driver IC[J]. Journal of Semiconductors, 2007, In Press.
Li X M, Zhuang Y Q, Zhang L, Xin W P. Cost-Effective VDMOS and Compatible Process for PDP Scan-Driver IC[J]. Chin. J. Semicond., 2007, 28(11): 1679.
Export: BibTex EndNote
|
Cost-Effective VDMOS and Compatible Process for PDP Scan-Driver IC
-
Abstract
A VDMOS integrated in a 170V scan-driver chip of a plasma display panel (PDP) is described,which is based on epitaxial bipolar-CMOS-DMOS (BCD) technology.Some key considerations and parameters of the design are discussed.The thickness of epitaxial layer is 17μm,the area of a single VDMOS structure cell is 324μm2,and only 18 photoetching steps are needed in the development process.It is also compatible with standard CMOS,bipolar,and p-LDMOS devices.The breakdown voltage of VDMOS in the process control module (PCM) is more than 200V.Five kinds of VDMOS modules are integrated in 64 channel PDP scan-driver IC,and on-line system verification is done on a LG-model-42v6 PDP.-
Keywords:
- PDP,
- VDMOS,
- BCD process,
- cost-effective,
- structure cell
-
References
-
Proportional views
DownLoad: