SEMICONDUCTOR TECHNOLOGY

Prevention of plasma-induced damage on thin gate oxides in BEOL sub-half micron CMOS processing

Qi He, Wenbin Zhao, Li Peng and Zongguang Yu

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 Corresponding author: He Qi, Email:heqi4316@yahoo.com.cn

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Abstract: A comparison is made of several plasma-induced damage (PID) measurement techniques. A novel PID mechanism using high-density plasma (HDP) inter-metal dielectric (IMD) deposition is proposed. The results of a design of experiment (DOE) on Ar pre-clean minimizing PID are presented. For HDP oxide deposition, the plasma damage is minimal, assuring minimal exposure time of the metal line to the plasma using a maximal deposition to sputter ratio. This process induces less PID than classic SOG processing. Ar pre-clean induces minimal plasma damage using minimal process time, high ion energy and high plasma power. For metal etching, an HDP etch is compared to a reactive ion etch, and the impact of the individual process steps are identified by specialized antenna structures. The measurement results of charge pumping, breakdown voltage and gate oxide leakage correlate very well. On metal etching, the reactive ion etching induces less plasma damage than HDP etching. For both reactors, PID is induced only in the metal over-etch step.

Key words: plasma induced damage (PID)dielectric depositionsputter ratioantenna structure



[1]
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[2]
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[3]
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[7]
Shih H H, Tsai C Y, Yang G S, et al. The prevention of charge damage on thin gate oxide from high density plasma deposition. 4th International Symposium on Plasma Process-Induced Damage, 1999:88 http://ieeexplore.ieee.org/document/798820/
[8]
Yamartino J M, Loewenhardt P K, Huang K. The sensitivity of electron shading damage to electron temperature, electron density and the plasma-to-wafer electron energy threshold. 4th International Symposium on Plasma Process-Induced Damage, 1999:33 http://ieeexplore.ieee.org/document/798802/?reload=true&arnumber=798802&punumber%3D6495
[9]
Roger P, Vahedi V, Alba S, et al. Effect of plasma density and uniformity, electron temperature, process gas, and chamber on electron shading damage. 4th International Symposium on Plasma Process-Induced Damage, 1999:25 http://ieeexplore.ieee.org/document/798800/
Fig. 1.  Layout of the poly antenna for the PID test structure

Fig. 2.  CP current, $V_{\rm bd}$ and gate leakage as a function of A.R. for the HDP and MDP

Fig. 3.  The results of gate oxide leakage and voltage breakdown measurements

Fig. 4.  Fused metal antennas measuring (a) the PID of the full metal etch process, (b) the PID of the over etch only, and (c) the PID of the main etch only

Fig. 5.  Plasma damage induced by HDP oxide deposition PID expressed as leaking gates with $I_{\rm g}$ > 1 nA (Mn: n as the metal level of the comb antenna)

Fig. 6.  Plasma damage induced by SOG and HDP oxide deposition gap-fill processing PID expressed as leaking gates with $I_{\rm g}$ $>$ 1 nA Ar pre-clean processing

Fig. 7.  Via resistance ($\Omega )$ as a function of ion energy and plasma density

Table 1.   The comparison of four processes with varying pressure and source power

[1]
Lin W. A new technique for measuring gate oxide leakage in charging protected MOSFETs. IEEE Trans Electron Devices, 2007, 54(4):683 doi: 10.1109/TED.2007.892010
[2]
Stanley W, Richard N T. Silicon processing for the VLSI era. California: Lattice Press, 2003
[3]
Cheung K P. Plasma charging damage. Great Britain: Springer, 2001
[4]
Creusen M, Ackaert J, De B E. Impact of reactor-and transistor-type on electron shading effects. 4th International Symposium on Plasma Process-Induced Damage, 1999:8 http://ieeexplore.ieee.org/document/798796/
[5]
Krishnan S, Brennan K, Xing G. A transient fuse scheme for plasma etch damage detection. 3rd International Symposium on Plasma Process-Induced Damage, 1998:201 http://ieeexplore.ieee.org/document/725609/?reload=true&arnumber=725609
[6]
Hwang G S, Giapis K P. Mechanism of charging damage during interlevel oxide deposition in high-density plasma tools. 3rd International Symposium on Plasma Process-Induced Damage, 1998:164 http://ieeexplore.ieee.org/document/725600/keywords
[7]
Shih H H, Tsai C Y, Yang G S, et al. The prevention of charge damage on thin gate oxide from high density plasma deposition. 4th International Symposium on Plasma Process-Induced Damage, 1999:88 http://ieeexplore.ieee.org/document/798820/
[8]
Yamartino J M, Loewenhardt P K, Huang K. The sensitivity of electron shading damage to electron temperature, electron density and the plasma-to-wafer electron energy threshold. 4th International Symposium on Plasma Process-Induced Damage, 1999:33 http://ieeexplore.ieee.org/document/798802/?reload=true&arnumber=798802&punumber%3D6495
[9]
Roger P, Vahedi V, Alba S, et al. Effect of plasma density and uniformity, electron temperature, process gas, and chamber on electron shading damage. 4th International Symposium on Plasma Process-Induced Damage, 1999:25 http://ieeexplore.ieee.org/document/798800/
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    Received: 29 November 2012 Revised: 21 January 2013 Online: Published: 01 June 2013

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      Qi He, Wenbin Zhao, Li Peng, Zongguang Yu. Prevention of plasma-induced damage on thin gate oxides in BEOL sub-half micron CMOS processing[J]. Journal of Semiconductors, 2013, 34(6): 066003. doi: 10.1088/1674-4926/34/6/066003 Q He, W B Zhao, L Peng, Z G Yu. Prevention of plasma-induced damage on thin gate oxides in BEOL sub-half micron CMOS processing[J]. J. Semicond., 2013, 34(6): 066003. doi: 10.1088/1674-4926/34/6/066003.Export: BibTex EndNote
      Citation:
      Qi He, Wenbin Zhao, Li Peng, Zongguang Yu. Prevention of plasma-induced damage on thin gate oxides in BEOL sub-half micron CMOS processing[J]. Journal of Semiconductors, 2013, 34(6): 066003. doi: 10.1088/1674-4926/34/6/066003

      Q He, W B Zhao, L Peng, Z G Yu. Prevention of plasma-induced damage on thin gate oxides in BEOL sub-half micron CMOS processing[J]. J. Semicond., 2013, 34(6): 066003. doi: 10.1088/1674-4926/34/6/066003.
      Export: BibTex EndNote

      Prevention of plasma-induced damage on thin gate oxides in BEOL sub-half micron CMOS processing

      doi: 10.1088/1674-4926/34/6/066003
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      • Corresponding author: He Qi, Email:heqi4316@yahoo.com.cn
      • Received Date: 2012-11-29
      • Revised Date: 2013-01-21
      • Published Date: 2013-06-01

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