SEMICONDUCTOR TECHNOLOGY

Analysis and optimization of TSV-TSV coupling in three-dimensional integrated circuits

Yingbo Zhao, Gang Dong and Yintang Yang

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 Corresponding author: Gang Dong, E-mail: gdong@xidian.edu.cn

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Abstract: Through silicon via (TSV)-TSV coupling is detrimental to the performance of three-dimensional (3D) integrated circuits (ICs) with the major negative effect of introducing coupling noise. In order to obtain an accurate estimation of the coupling level from TSV-TSV in the early design stage, this paper first proposes an impedance-level model of the coupling channel between TSVs based on a two-port network, and then derives the formula of the coupling coefficient to describe the TSV-TSV coupling effect. The accuracy of the formula is validated by comparing the results with 3D full-wave simulations. Furthermore, a design technique for optimizing the coupling between adjacent coupled signal TSVs is proposed. Through SPICE simulations, the proposed technique shows its feasibility to reduce the coupling noise for both a simple TSV-TSV circuit and a complicated circuit with more TSVs, and demonstrates its potential for designers in achieving the goal of improving the electrical performance of 3D ICs.

Key words: 3D integrationthough silicon vias (TSVs)two-port networkequivalent impedancenoise coupling reduction



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Fig. 1.  The physical structure of the GSSG-type TSV in a 3D IC.

Fig. 2.  (a) An impedance-level model of the TSV-TSV coupling channel, and (b) the formation of impedance.

Fig. 3.  Comparison of the results of the proposed formula and HFSS (a) with $t_{\rm ox}$ variation, and (b) with $p_{\rm SS}$ variation.

Fig. 4.  (a) Two coupled signal TSVs with one aggressor and one victim, and (b) a simplified model for coupling analysis.

Fig. 5.  Coupling noise measured at the load of the victim TSV with a 1 GHz input signal injected into the driving port of the aggressor TSV.

Fig. 6.  Input signal received at the load of the aggressor TSV.

Fig. 7.  Adjacent coupled TSVs with two aggressors and one victim. (a) A cross-sectional view and (b) a vertical-sectional view.

Fig. 8.  Coupling noise measured at the load of the victim TSV with two input signals $V_{\rm in1}$ and $V_{\rm in2}$ switching from 0 to 1 V simultaneously.

Fig. 9.  Coupling noise measured at the load of the victim TSV with two input signals $V_{\rm in1}$ and $V_{\rm in2}$ switching from 1 V to 0 simultaneously.

Fig. 10.  Coupling noise measured at the load of the victim TSV with two input signals $V_{\rm in1}$ and $V_{\rm in2}$ switching in the opposite direction.

Fig. 11.  Adjacent coupled TSVs with four aggressors and one victim. (a) A cross-sectional view and (b) a vertical-sectional view.

Table 1.   The design parameters of the coupling test vehicle in this paper.

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Table 2.   Coupling noise measured on the victim TSV with various switching types for the input signals on the four aggressors TSVs.

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    Received: 25 August 2014 Revised: Online: Published: 01 April 2015

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      Yingbo Zhao, Gang Dong, Yintang Yang. Analysis and optimization of TSV-TSV coupling in three-dimensional integrated circuits[J]. Journal of Semiconductors, 2015, 36(4): 045011. doi: 10.1088/1674-4926/36/4/045011 Y B Zhao, G Dong, Y T Yang. Analysis and optimization of TSV-TSV coupling in three-dimensional integrated circuits[J]. J. Semicond., 2015, 36(4): 045011. doi: 10.1088/1674-4926/36/4/045011.Export: BibTex EndNote
      Citation:
      Yingbo Zhao, Gang Dong, Yintang Yang. Analysis and optimization of TSV-TSV coupling in three-dimensional integrated circuits[J]. Journal of Semiconductors, 2015, 36(4): 045011. doi: 10.1088/1674-4926/36/4/045011

      Y B Zhao, G Dong, Y T Yang. Analysis and optimization of TSV-TSV coupling in three-dimensional integrated circuits[J]. J. Semicond., 2015, 36(4): 045011. doi: 10.1088/1674-4926/36/4/045011.
      Export: BibTex EndNote

      Analysis and optimization of TSV-TSV coupling in three-dimensional integrated circuits

      doi: 10.1088/1674-4926/36/4/045011
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      Project supported by the National Natural Science Foundation of China (No. 61334003).

      More Information
      • Corresponding author: E-mail: gdong@xidian.edu.cn
      • Received Date: 2014-08-25
      • Accepted Date: 2014-10-26
      • Published Date: 2015-01-25

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