SEMICONDUCTOR INTEGRATED CIRCUITS

Circuit design of a novel FPGA chip FDP2008

Wu Fang, Wang Yabin, Chen Liguang, Wang Jian, Lai Jinmei, Wang Yuan and Tong Jiarong

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Abstract: A novel FPGA chip FDP2008 (Fudan Programmable Logic) has been designed and implemented with the SMIC 0.18 μm CMOS logic 1P6M process. The new design method means that the configurable logic block can be configured as distributed RAM and a shift register. A universal programmable routing circuit is also presented; by adopting offset lines, complementary hanged end-lines and MUX + Buffer routing switches, the whole FPGA chip is highly repeatable, and the signal delay is uniform and predictable over the total chip. A standard configuration interface SPI is added in the configuration circuit, and a group of highly sensitive amplifiers is used to magnify the read back data. FDP2008 contains 20 × 30 logic TILEs, 200 programmable IOBs and 10 × 4 kbit dual port block RAMs. The hardware software cooperation test shows that FDP2008 works correctly and efficiently.

Key words: FPGA

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    Received: 18 August 2015 Revised: 22 June 2009 Online: Published: 01 November 2009

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      Wu Fang, Wang Yabin, Chen Liguang, Wang Jian, Lai Jinmei, Wang Yuan, Tong Jiarong. Circuit design of a novel FPGA chip FDP2008[J]. Journal of Semiconductors, 2009, 30(11): 115009. doi: 10.1088/1674-4926/30/11/115009 Wu F, Wang Y B, Chen L G, Wang J, Lai J M, Wang Y, Tong J R. Circuit design of a novel FPGA chip FDP2008[J]. J. Semicond., 2009, 30(11): 115009. doi: 10.1088/1674-4926/30/11/115009.Export: BibTex EndNote
      Citation:
      Wu Fang, Wang Yabin, Chen Liguang, Wang Jian, Lai Jinmei, Wang Yuan, Tong Jiarong. Circuit design of a novel FPGA chip FDP2008[J]. Journal of Semiconductors, 2009, 30(11): 115009. doi: 10.1088/1674-4926/30/11/115009

      Wu F, Wang Y B, Chen L G, Wang J, Lai J M, Wang Y, Tong J R. Circuit design of a novel FPGA chip FDP2008[J]. J. Semicond., 2009, 30(11): 115009. doi: 10.1088/1674-4926/30/11/115009.
      Export: BibTex EndNote

      Circuit design of a novel FPGA chip FDP2008

      doi: 10.1088/1674-4926/30/11/115009
      • Received Date: 2015-08-18
      • Accepted Date: 2009-04-12
      • Revised Date: 2009-06-22
      • Published Date: 2009-10-29

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