SEMICONDUCTOR INTEGRATED CIRCUITS

A low-power high-performance configurable auto-gain control loop for a digital hearing aid SoC

Chengying Chen, Hainan Liu, Yong Hei, Jun Fan and Xiaoyu Hu

+ Author Affiliations

 Corresponding author: Chen Chengying, chenchengying@ime.ac.cn

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Abstract: A low-power, configurable auto-gain control loop for a digital hearing aid system on a chip (SoC) is presented. By adopting a mixed-signal feedback control structure and peak detection and judgment, it can work in automatic gain or variable gain control modes through a digital signal processing unit. A noise-reduction and dynamic range (DR) improvement technique is also used to ensure the DR of the circuit in a low-voltage supply. The circuit is implemented in an SMIC 0.13 μm 1P8M CMOS process. The measurement results show that in a 1 V power supply, 1.6 kHz input frequency and 200 mVp-p, the SFDR is 74.3 dB, the THD is 66.1 dB, and the total power is 89 μ W, meeting the application requirements of hearing aid SoCs.

Key words: hearing aid devicelow powergain controldigital feedback



[1]
Kim S, Lee J Y, Song S J, et al. An energy-efficient analog front-end circuit for a sub-1 V digital hearing aid. IEEE J Solid-State Circuits, 2006, 41(4):876 doi: 10.1109/JSSC.2006.870798
[2]
Kim S, Lee J Y, Nam J C, et al. A full integrated digital hearing aid chip with human factor considerations. IEEE J Solid-State Circuit, 2008, 43(1):266 doi: 10.1109/JSSC.2007.914721
[3]
Silva M J, Solis B S, Schellenberg M. A CMOS hearing aid device. Analog Integrated Circuit and Signal Processing, 1999, 21(2):163 doi: 10.1023/A:1008373824380
[4]
Baker M W, Sarpeshkar R. Low-power single-loop and dual-loop AGCs for bionic ears. IEEE J Solid-State Circuits, 2006, 41(9):1983 doi: 10.1109/JSSC.2006.880599
[5]
Serra G F, Huertas J L. Low voltage CMOS sub threshold log amplification and AGC. IEEE Proc Circuit Devices System, 2005, 52(1):61
[6]
Azzolini C. A 1-V CMOS audio amplifier for low cost hearing aids. Proc 15th, IEEE international Conference on Electronics, Circuit and Systems, 2008 http://ieeexplore.ieee.org/document/4674915/
[7]
Li Fanyang, Yang Haigang, Liu Fei, et al. A current mode feed-forward gain control system for a 0.8 V CMOS hearing aid. Journal of Semiconductors, 2011, 32(6):065010 doi: 10.1088/1674-4926/32/6/065010
[8]
Hauptmann J, Dielacher F, Steiner R, et al. A low-noise amplifier with automatic gain control and anticlippingcontrol in CMOS technology. IEEE J Solid-State Circuits, 1992, 27(7):974 doi: 10.1109/4.142591
[9]
Neuteboom H, Kup B, Hanssens M. A DSP-based hearing instrument I. IEEE J Solid-State Circuits, 1997, 32(11):1790 doi: 10.1109/4.641702
[10]
Sarpeskar R, Baker M, Salthouse C, et al. An analog bionic ear processor with zero-crossing detection. Proc ISSCC, San Francisco, CA, 2005, 42:78 http://ieeexplore.ieee.org/document/1493877/?arnumber=1493877&filter%3DAND(p_IS_Number:32118)
[11]
Gao D M. Research on the automatic gain control amplifier with adaptive universal control. PhD Dissertation, Beijing, IMECAS, 2006
Fig. 1.  Block diagram of the two-channel digital hearing aid system.

Fig. 2.  The characteristics of the microphone input signal.

Fig. 3.  Block diagram of the AGC.

Fig. 4.  The circuit of a two-stage OTA.

Fig. 5.  The comparator circuit.

Fig. 6.  The basis of digital peak detection and judgment.

Fig. 7.  The AGC chip.

Fig. 8.  Gain versus noise.

Fig. 9.  The spectrum of the output signal.

Fig. 10.  Gain versus DR.

Table 1.   Performance comparison of the configurable gain amplifier.

Table 2.   Performance summary of the AGC.

[1]
Kim S, Lee J Y, Song S J, et al. An energy-efficient analog front-end circuit for a sub-1 V digital hearing aid. IEEE J Solid-State Circuits, 2006, 41(4):876 doi: 10.1109/JSSC.2006.870798
[2]
Kim S, Lee J Y, Nam J C, et al. A full integrated digital hearing aid chip with human factor considerations. IEEE J Solid-State Circuit, 2008, 43(1):266 doi: 10.1109/JSSC.2007.914721
[3]
Silva M J, Solis B S, Schellenberg M. A CMOS hearing aid device. Analog Integrated Circuit and Signal Processing, 1999, 21(2):163 doi: 10.1023/A:1008373824380
[4]
Baker M W, Sarpeshkar R. Low-power single-loop and dual-loop AGCs for bionic ears. IEEE J Solid-State Circuits, 2006, 41(9):1983 doi: 10.1109/JSSC.2006.880599
[5]
Serra G F, Huertas J L. Low voltage CMOS sub threshold log amplification and AGC. IEEE Proc Circuit Devices System, 2005, 52(1):61
[6]
Azzolini C. A 1-V CMOS audio amplifier for low cost hearing aids. Proc 15th, IEEE international Conference on Electronics, Circuit and Systems, 2008 http://ieeexplore.ieee.org/document/4674915/
[7]
Li Fanyang, Yang Haigang, Liu Fei, et al. A current mode feed-forward gain control system for a 0.8 V CMOS hearing aid. Journal of Semiconductors, 2011, 32(6):065010 doi: 10.1088/1674-4926/32/6/065010
[8]
Hauptmann J, Dielacher F, Steiner R, et al. A low-noise amplifier with automatic gain control and anticlippingcontrol in CMOS technology. IEEE J Solid-State Circuits, 1992, 27(7):974 doi: 10.1109/4.142591
[9]
Neuteboom H, Kup B, Hanssens M. A DSP-based hearing instrument I. IEEE J Solid-State Circuits, 1997, 32(11):1790 doi: 10.1109/4.641702
[10]
Sarpeskar R, Baker M, Salthouse C, et al. An analog bionic ear processor with zero-crossing detection. Proc ISSCC, San Francisco, CA, 2005, 42:78 http://ieeexplore.ieee.org/document/1493877/?arnumber=1493877&filter%3DAND(p_IS_Number:32118)
[11]
Gao D M. Research on the automatic gain control amplifier with adaptive universal control. PhD Dissertation, Beijing, IMECAS, 2006
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    Received: 21 March 2013 Revised: 15 May 2013 Online: Published: 01 October 2013

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      Chengying Chen, Hainan Liu, Yong Hei, Jun Fan, Xiaoyu Hu. A low-power high-performance configurable auto-gain control loop for a digital hearing aid SoC[J]. Journal of Semiconductors, 2013, 34(10): 105011. doi: 10.1088/1674-4926/34/10/105011 C Y Chen, H N Liu, Y Hei, J Fan, X Y Hu. A low-power high-performance configurable auto-gain control loop for a digital hearing aid SoC[J]. J. Semicond., 2013, 34(10): 105011. doi: 10.1088/1674-4926/34/10/105011.Export: BibTex EndNote
      Citation:
      Chengying Chen, Hainan Liu, Yong Hei, Jun Fan, Xiaoyu Hu. A low-power high-performance configurable auto-gain control loop for a digital hearing aid SoC[J]. Journal of Semiconductors, 2013, 34(10): 105011. doi: 10.1088/1674-4926/34/10/105011

      C Y Chen, H N Liu, Y Hei, J Fan, X Y Hu. A low-power high-performance configurable auto-gain control loop for a digital hearing aid SoC[J]. J. Semicond., 2013, 34(10): 105011. doi: 10.1088/1674-4926/34/10/105011.
      Export: BibTex EndNote

      A low-power high-performance configurable auto-gain control loop for a digital hearing aid SoC

      doi: 10.1088/1674-4926/34/10/105011
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      Project supported by the Chinese National Science and Technology Expertise Program (No. Y1GZ212001)

      the Chinese National Science and Technology Expertise Program Y1GZ212001

      More Information
      • Corresponding author: Chen Chengying, chenchengying@ime.ac.cn
      • Received Date: 2013-03-21
      • Revised Date: 2013-05-15
      • Published Date: 2013-10-01

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