SPECIAL ISSUE ON Si-BASED MATERIALS AND DEVICES

Research progress of Ge on insulator grown by rapid melting growth

Zhi Liu1, 2, Juanjuan Wen1, Chuanbo Li1, 2, Chunlai Xue1, 2 and Buwen Cheng1, 2,

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 Corresponding author: Buwen Cheng, cbw@semi.ac.cn

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Abstract: Ge is an attractive material for Si-based microelectronics and photonics due to its high carries mobility, pseudo direct bandgap structure, and the compatibility with complementary metal oxide semiconductor (CMOS) processes. Based on Ge, Ge on insulator (GOI) not only has these advantages, but also provides strong electronic and optical confinement. Recently, a novel technique to fabricate GOI by rapid melting growth (RMG) has been described. Here, we introduce the RMG technique and review recent efforts and progress in RMG. Firstly, we will introduce process steps of RMG. We will then review the researches which focus on characterizations of the GOI including growth dimension, growth mechanism, growth orientation, concentration distribution, and strain status. Finally, GOI based applications including high performance metal–oxide–semiconductor field effect transistors (MOSFETs) and photodetectors will be discussed. These results show that RMG is a promising technique for growth of high quality GOIs with different characterizations. The GOI grown by RMG is a potential material for the next-generation of integrated circuits and optoelectronic circuits.

Key words: rapid melting growthGe on insulatorMOSFETphotodetectors



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Fig. 1.  (a) High-resolution TEM picture for the Ge stripe after crystallization. Its associated SAD pattern is in the inset. (b) High-resolution TEM picture for the Ge/bottom SiO2 interface.

Fig. 2.  (a) Cross-sectional schematics of the RMG. (b) Process steps of RMG.

Fig. 3.  (Color online) Optical micrographs of GOIs with different sizes. (a) GOI circle with diameter of 100 μm. (b) GOI stripes with width of 2 μm. (c) GOI stripes with width of 5 μm.

Fig. 4.  (Color online) (a) Schematic structure of the vertically multiply stack GOI. (b) Cross-sectional SEM image of the GOI. (c) SEM image of the GOI. (d) EBSD image of the GOI.

Fig. 5.  (Color online) Calculational heterogeneous nucleation rate, homogeneous nucleation rate, and growth rate of a GOI at different temperatures.

Fig. 6.  Growth mechanism of GOI. (a) Near seeding region. (b) Far from seeding region.

Fig. 7.  (Color online) (a) EBSD image of the GOIs using poly-Si seed. (b) EBSD image of the GOIs using amorphous Si seeds.

Fig. 8.  (Color online) (a) Lattice rotation along GOI stripes relative to the origin at soaking temperatures of 924, 945, 957, 967, and 977 °C. (b) Relationship between the average cooling rate in the crystallization of Ge and the maximum lattice rotation along the GOI stripes.

Fig. 9.  (a) Si–Ge phase diagram. (b) Si fraction profiles and calculational curves of GOIs with different lengths. The annealing temperature is 985 °C.

Fig. 10.  (Color online) (a) Strain of the GOI stripes (with SiO2 micro-crucible) annealed at various temperatures (910–990 °C/s). (b) Strain of the GOI stripes (SiO2 micro-crucible was removed) annealed at various temperatures (910–990 °C/s).

Fig. 11.  (Color online) (a) IDVD characteristics of the device at gate bias ranging from −2 to −10 V in −1 V step. (b) IDVG characteristics of the device with drain bias ranging from −0.02 to −0.2 V in −0.02 V step. The inset is the schematic of the back-gate MOSFET.

[1]
Chui C O, Ramanathan S, Triplett B B, et al. Germanium MOS capacitors incorporating ultrathin high-kappa gate dielectric. IEEE Electron Device Lett, 2002, 23(8): 473 doi: 10.1109/LED.2002.801319
[2]
Miyao M, Murakami E, Etoh H, et al. High hole mobility in strained Ge channel of modulation-doped p-Si0.5Ge0.5/Ge/Si1-x-Gex heterostructure. J Cryst Growth, 1991, 111(1-4): 912 doi: 10.1016/0022-0248(91)91106-K
[3]
Hashemi P, Hoyt J L. High hole-mobility strained-Ge/Si0.6Ge0.4 P-MOSFETs with high-k/metal gate: role of strained-Si cap thickness. IEEE Electron Device Lett, 2012, 33(2): 173 doi: 10.1109/LED.2011.2176913
[4]
Pillarisetty R, Chu-Kung B, Corcoran S, et al. High mobility strained germanium quantum well field effect transistor as the p-channel device option for low power (Vcc = 0.5 V) III–V CMOS architecture. IEEE International Electron Devices Meeting, 2010: 6.7.1
[5]
Irisawa T, Tokumitsu S, Hattori T, et al. Ultrahigh room-temperature hole Hall and effective mobility in Si0.3Ge0.7/Ge/ Si0.3Ge0.7 heterostructures. Appl Phys Lett, 2002, 81(5): 847 doi: 10.1063/1.1497725
[6]
Huang C H, Yang M Y, Chin A, et al. Very low defects and high performance Ge-on-insulator p-MOSFETs with Al2O3 gate dielectrics. 2003 Symposium on VLSI Technology, 2003: 119
[7]
Liu J, Michel J, Giziewicz W, et al. High-performance, tensile-strained Ge pin photodetectors on a Si platform. Appl Phys Lett, 2005, 87(10): 103501 doi: 10.1063/1.2037200
[8]
Geiger R, Zabel T, Sigg H. Group IV direct band gap photonics: methods, challenges, and opportunities. Front Mater, 2015, 2: 52 doi: 10.3389/fmats.2015.00052
[9]
Cheng B W, Li C, Liu Z, et al. Research progress of Si-based germanium materials and devices. J Semicond, 2016, 37(8): 081001 doi: 10.1088/1674-4926/37/8/081001
[10]
Klinger S, Berroth M, Kaschel M, et al. Ge-on-Si p–i–n photodiodes with a 3-dB bandwidth of 49 GHz. IEEE Photoic Tech Lett, 2009, 21(13): 920 doi: 10.1109/LPT.2009.2020510
[11]
Li C, Xue C, Liu Z, et al. High-bandwidth and high-responsivity top-illuminated germanium photodiodes for optical interconnection. IEEE Trans Electron Devices, 2013, 60(3): 1183 doi: 10.1109/TED.2013.2241066
[12]
Chen H, Verheyen P, De Heyn P, et al. –1 V bias 67 GHz bandwidth Si-contacted germanium waveguide p–i–n photodetector for optical links at 56 Gbps and beyond. Opt Express, 2016, 24(5): 4622 doi: 10.1364/OE.24.004622
[13]
Liu J, Beals M, Pomerene A, et al. Waveguide-integrated, ultralow-energy GeSi electro-absorption modulators. Nat Photon, 2008, 2(7): 433 doi: 10.1038/nphoton.2008.99
[14]
Srinivasan S A, Pantouvaki M, Gupta S, et al. 56 Gb/s germanium waveguide electro-absorption modulator. J Lightwave Technol, 2016, 34(2): 419 doi: 10.1109/JLT.2015.2478601
[15]
Kuo Y H, Lee Y K, Ge Y, et al. Strong quantum-confined Stark effect in germanium quantum-well structures on silicon. Nature, 2005, 437(27): 1334
[16]
Liu J, Sun X, Camacho-Aguilera R, et al. Ge-on-Si laser operating at room temperature. Opt Lett, 2010, 35(5): 679 doi: 10.1364/OL.35.000679
[17]
Liu Z, Hu W, Li C, et al. Room temperature direct-bandgap electroluminescence from n-type strain-compensated Ge/SiGe multiple quantum wells. Appl Phys Lett, 2012, 101(23): 231108 doi: 10.1063/1.4769834
[18]
Liu Z, Li Y, He C, et al. Direct-bandgap electroluminescence from a horizontal Ge p–i–n ridge waveguide on Si(001) substrate. Appl Phys Lett, 2014, 104(19): 191111 doi: 10.1063/1.4878619
[19]
Akatsu T, Deguet C, Sanchez L, et al. Germanium-on-insulator (GeOI) substrates—a novel engineered substrate for future high performance devices. Mater Sci Semicon Proc, 2006, 9(4/5): 444 doi: 10.1016/j.mssp.2006.08.077
[20]
Pitera A J, Taraschi G, Lee M L, et al. Coplanar integration of lattice-mismatched semiconductors with silicon by wafer bonding Ge/Si1-xGex/Si virtual substrates. J Electrochem Soc, 2004, 151(7): G443 doi: 10.1149/1.1757462
[21]
Taraschi G, Pitera A J, Fitzgerald E A. Strained Si, SiGe, and Ge on-insulator: review of wafer bonding fabrication techniques. Solid-State Electron, 2004, 48(8): 1297 doi: 10.1016/j.sse.2004.01.012
[22]
Akatsu T, Deguet C, Sanchez L, et al. 200 mm germanium-on-insulator (GeOI) by Smart CutTM technology and recent GeOI pMOSFETs achievements. 2005 IEEE International SOI Conference, 2005, 137
[23]
Sugiyama N, Tezuka T, Mizuno T, et al. Temperature effects on Ge condensation by thermal oxidation of SiGe-on-insulator structures. J Appl Phys, 2004, 95(8): 4007 doi: 10.1063/1.1649812
[24]
Nakaharai S, Tezuka T, Sugiyama N, et al. Characterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-condensation technique. Appl Phys Lett, 2003, 83(17): 3516 doi: 10.1063/1.1622442
[25]
Huang S, Lu W, Li C, et al. A CMOS-compatible approach to fabricate an ultra-thin germanium-on-insulator with large tensile strain for Si-based light emission. Opt Express, 2013, 21(1): 640 doi: 10.1364/OE.21.000640
[26]
Maeda T, Ikeda K, Nakaharai S, et al. Thin-body Ge-on-insulator p-channel MOSFETs with Pt germanide metal source/drain. Thin Solid Films, 2006, 508(1): 346
[27]
Nakaharai S, Tezuka T, Hirashita N, et al. The generation of crystal defects in Ge-on-insulator (GOI) layers in the Ge-condensation process. Semicond Sci Tech, 2007, 22(1): S103 doi: 10.1088/0268-1242/22/1/S24
[28]
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    Received: 26 October 2017 Revised: 11 December 2017 Online: Accepted Manuscript: 15 March 2018Published: 01 June 2018

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      Zhi Liu, Juanjuan Wen, Chuanbo Li, Chunlai Xue, Buwen Cheng. Research progress of Ge on insulator grown by rapid melting growth[J]. Journal of Semiconductors, 2018, 39(6): 061005. doi: 10.1088/1674-4926/39/6/061005 Z Liu, J J Wen, C B Li, C L Xue, B W Cheng. Research progress of Ge on insulator grown by rapid melting growth[J]. J. Semicond., 2018, 39(6): 061005. doi: 10.1088/1674-4926/39/6/061005.Export: BibTex EndNote
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      Zhi Liu, Juanjuan Wen, Chuanbo Li, Chunlai Xue, Buwen Cheng. Research progress of Ge on insulator grown by rapid melting growth[J]. Journal of Semiconductors, 2018, 39(6): 061005. doi: 10.1088/1674-4926/39/6/061005

      Z Liu, J J Wen, C B Li, C L Xue, B W Cheng. Research progress of Ge on insulator grown by rapid melting growth[J]. J. Semicond., 2018, 39(6): 061005. doi: 10.1088/1674-4926/39/6/061005.
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      Research progress of Ge on insulator grown by rapid melting growth

      doi: 10.1088/1674-4926/39/6/061005
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      Project supported in part by the National Key Research and Development Program of China (No. 2017YFA0206404) and the National Natural Science Foundation of China (Nos. 61435013, 61534005, 61534004, 61604146).

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      • Corresponding author: cbw@semi.ac.cn
      • Received Date: 2017-10-26
      • Revised Date: 2017-12-11
      • Published Date: 2018-06-01

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