SEMICONDUCTOR INTEGRATED CIRCUITS

An IO block array in a radiation-hardened SOI SRAM-based FPGA

Zhao Yan, Wu Lihua, Han Xiaowei, Li Yan, Zhang Qianli, Chen Liang, Zhang Guoquan, Li Jianzhong, Yang Bo, Gao Jiantou, Wang Jian, Li Ming, Liu Guizhai, Zhang Feng, Guo Xufeng, Zhao Kai, Stanley L. Chen, Yu Fang and Liu Zhongli

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Abstract: We present an input/output block (IOB) array used in the radiation-hardened SRAM-based field-programmable gate array (FPGA) VS1000, which is designed and fabricated with a 0.5 μ m partially depleted silicon-on-insulator (SOI) logic process at the CETC 58th Institute. Corresponding with the characteristics of the FPGA, each IOB includes a local routing pool and two IO cells composed of a signal path circuit, configurable input/output buffers and an ESD protection network. A boundary-scan path circuit can be used between the programmable buffers and the input/output circuit or as a transparent circuit when the IOB is applied in different modes. Programmable IO buffers can be used at TTL/CMOS standard levels. The local routing pool enhances the flexibility and routability of the connection between the IOB array and the core logic. Radiation-hardened designs, including A-type and H-type body-tied transistors and special D-type registers, improve the anti-radiation performance. The ESD protection network, which provides a high-impulse discharge path on a pad, prevents the breakdown of the core logic caused by the immense current. These design strategies facilitate the design of FPGAs with different capacities or architectures to form a series of FPGAs. The functionality and performance of the IOB array is proved after a functional test. The radiation test indicates that the proposed VS1000 chip with an IOB array has a total dose tolerance of 100 krad(Si), a dose survivability rate of 1.5 × 1011 rad(Si)/s, and a neutron fluence immunity of 1 × 1014 n/cm2.

Key words: partially-depleted SOIFPGAIOBradiation-hardenedESD protection

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    Received: 20 August 2015 Revised: 27 June 2011 Online: Published: 01 January 2012

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      Zhao Yan, Wu Lihua, Han Xiaowei, Li Yan, Zhang Qianli, Chen Liang, Zhang Guoquan, Li Jianzhong, Yang Bo, Gao Jiantou, Wang Jian, Li Ming, Liu Guizhai, Zhang Feng, Guo Xufeng, Zhao Kai, Stanley L. Chen, Yu Fang, Liu Zhongli. An IO block array in a radiation-hardened SOI SRAM-based FPGA[J]. Journal of Semiconductors, 2012, 33(1): 015010. doi: 10.1088/1674-4926/33/1/015010 Zhao Y, Wu L H, Han X W, Li Y, Zhang Q L, Chen L, Zhang G Q, Li J Z, Yang B, Gao J T, Wang J, Li M, Liu G Z, Zhang F, Guo X F, Zhao K, Stanley L. Chen, Yu F, Liu Z L. An IO block array in a radiation-hardened SOI SRAM-based FPGA[J]. J. Semicond., 2012, 33(1): 015010. doi: 10.1088/1674-4926/33/1/015010.Export: BibTex EndNote
      Citation:
      Zhao Yan, Wu Lihua, Han Xiaowei, Li Yan, Zhang Qianli, Chen Liang, Zhang Guoquan, Li Jianzhong, Yang Bo, Gao Jiantou, Wang Jian, Li Ming, Liu Guizhai, Zhang Feng, Guo Xufeng, Zhao Kai, Stanley L. Chen, Yu Fang, Liu Zhongli. An IO block array in a radiation-hardened SOI SRAM-based FPGA[J]. Journal of Semiconductors, 2012, 33(1): 015010. doi: 10.1088/1674-4926/33/1/015010

      Zhao Y, Wu L H, Han X W, Li Y, Zhang Q L, Chen L, Zhang G Q, Li J Z, Yang B, Gao J T, Wang J, Li M, Liu G Z, Zhang F, Guo X F, Zhao K, Stanley L. Chen, Yu F, Liu Z L. An IO block array in a radiation-hardened SOI SRAM-based FPGA[J]. J. Semicond., 2012, 33(1): 015010. doi: 10.1088/1674-4926/33/1/015010.
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      An IO block array in a radiation-hardened SOI SRAM-based FPGA

      doi: 10.1088/1674-4926/33/1/015010
      • Received Date: 2015-08-20
      • Accepted Date: 2011-06-27
      • Revised Date: 2011-06-27
      • Published Date: 2011-12-28

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