J. Semicond. > 2017, Volume 38 > Issue 6 > 065004, doi: 10.1088/1674-4926/38/6/065004

SEMICONDUCTOR INTEGRATED CIRCUITS

Scalable wideband equivalent circuit model for silicon-based on-chip transmission lines

Hansheng Wang, Weiliang He, Minghui Zhang and Lu Tang

+ Author Affiliations

 Corresponding author: Lu Tang Email:lutang2k@seu.edu.cn

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Abstract: A scalable wideband equivalent circuit model of silicon-based on-chip transmission lines is presented in this paper along with an efficient analytical parameter extraction method based on improved characteristic function approach, including a relevant equation to reduce the deviation caused by approximation. The model consists of both series and shunt lumped elements and accounts for high-order parasitic effects. The equivalent circuit model is derived and verified to recover the frequency-dependent parameters at a range from direct current to 50 GHz accurately. The scalability of the model is proved by comparing simulated and measured scattering parameters with the method of cascade, attaining excellent results based on samples made from CMOS 0.13 and 0.18μm process.

Key words: on-chip transmission line, equivalent circuit model, wideband, characteristic function, scalability



[1]
Singh U, Garg A, Raghavan B, et al. A 780 mW 4×28 Gb/s transceiver for 100 GbE gearbox PHY in 40 nm CMOS. IEEE J Solid-State Circuits, 2014, 49(12):3116 doi: 10.1109/JSSC.2014.2352299
[2]
Hu S, Kousai S, Wang H. A broadband mixed-signal CMOS power amplifier with a hybrid class-G doherty efficiency enhancement technique. IEEE J Solid-State Circuits, 2016, 51(3):598 doi: 10.1109/JSSC.2015.2508023
[3]
Yu T, Wang H Z, Zhou B, et al. Multi-agent correlated equilibrium Q.(λ)learning for coordinated smart generation control of interconnected power grids. IEEE Trans Power Syst, 2015, 30(4):1669 doi: 10.1109/TPWRS.2014.2357079
[4]
Kan R, Tanaka T, Sugizaki G, et al. A 10th generation 16-core SPARC64.processor for mission-critical UNIX server. IEEE J Solid-State Circuits, 2014, 49(1):32 doi: 10.1109/JSSC.2013.2284650
[5]
Therdsteerasukdi K, Byun G S, Ir J, et al. Utilizing radiofrequency interconnect for a many-DIMM DRAM system. IEEE J Emerg Sel Topic Circuits Syst, 2012, 2(2):210 doi: 10.1109/JETCAS.2012.2193843
[6]
Antonsen T M, Vlasov A N, Chernin D P, et al. Transmission line model for folded waveguide circuits. IEEE Trans Electron Devices, 2013, 60(9):2906 doi: 10.1109/TED.2013.2272659
[7]
Syms R R A, Sydoruk O, Solymar L. Transmission-line model of noisy electromagnetic media. IEEE Trans Microw Theory Tech, 2013, 61(1):14 doi: 10.1109/TMTT.2012.2226742
[8]
Yang C, Yu H, Shang Y, et al. Characterization of CMOS metamaterial transmission line by compact fractional-order equivalent circuit model. IEEE Trans Electron Devices, 2015, 62(9):3012 doi: 10.1109/TED.2015.2458931
[9]
Zhu Y, Kang K, Wu Y, et al. An equivalent circuit model with current return path effects for on-chip interconnect up to 80 GHz. IEEE Trans Compon Packag Technol, 2015, 5(9):1320 doi: 10.1109/TCPMT.2015.2448572
[10]
Zheng Z, Ren K, Sun L, et al. A comparative study of three transmission line models for on-chip interconnects. IEEE Int Conf Commun Pro Sol, 2014:332 https://www.researchgate.net/publication/283025554_A_comparative_study_of_three_transmission_line_models_for_on-chip_interconnects
[11]
Sun S, Kumar R, Rustagi S C, et al. Wideband lumped element model for on-chip interconnects on lossy silicon substrate. IEEE Radio Freq Integr Circuits Symp, 2006:4 https://www.researchgate.net/publication/251851041_Wideband_Lumped_Element_Model_for_On-Chip_Asymmetrical_Coupled_Interconnects_on_Lossy_Silicon_Substrate
[12]
Kang K, Nan L, Rustagi S C, et al. A wideband scalable and SPICE-compatible model for on-chip interconnects up to 110 GHz. IEEE Trans Microw Theory Tech, 2008, 56(4):942 doi: 10.1109/TMTT.2008.919374
[13]
Gupta K C, Garg R, Chadha R. Computer aided design of microwave circuits. Dedham, MA:Artech House, 1981 https://www.researchgate.net/publication/234265070_Computer-Aided_Design_of_Microwave_Circuits
[14]
Eisenstadt W R, Eo Y. S-parameter-based IC interconnect transmission line characterization. IEEE Trans Compon, Hybrids, Manuf Technol, 1992, 15(4):483 doi: 10.1109/33.159877
[15]
Chen H H, Zhang H W, Chung S J, et al. Accurate systematic model-parameter extraction for on-chip spiral inductors. IEEE Trans Electron Devices, 2008, 55(11):3267 doi: 10.1109/TED.2008.2005131
[16]
Dhaene T, De Zutter D. Selection of lumped element models for coupled lossy transmission lines. IEEE Trans Comput Aided Design Integr Circuits Syst, 1992, 11(7):805 doi: 10.1109/43.144845
Fig. 1.  The testing photo of transmission line implemented by CMOS 0.13 μm.

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Fig. 2.  The testing photo of transmission line implemented by CMOS 0.18 μm.

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Fig. 3.  The equivalent circuit model of silicon-based on-chip transmission lines per unit length.

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Fig. 4.  The linear regression figure of F1 (ω)

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Fig. 5.  The linear regression figure of F2(ω)

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Fig. 6.  The linear regression figure of F3(ω).

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Fig. 7.  The linear regression figure of F4(ω).

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Fig. 8.  The linear regression figure of F5(ω).

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Fig. 9.  The simulation of S11 with CMOS 0.13 μm.

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Fig. 10.  The simulation of S12 with CMOS 0.13 μm.

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Fig. 11.  The simulation of S11 with CMOS 0.18 μm.

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Fig. 12.  The simulation of S12 with CMOS 0.18 μm

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Fig. 13.  The simulation of S11 with W=10 μm.

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Fig. 14.  The simulation of S12 with W =10 μm.

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Fig. 15.  The simulation of S11 with W=15 μm.

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Fig. 16.  The simulation of S12 with W=15 μm.

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Table 1.   The Extracted Results of Model Parameters (Part Ⅰ).

Table 2.   The extracted results of model parameters (Part Ⅱ).

Table 3.   The extracted results of model parameters (Part Ⅲ).

Table 4.   The extracted results of model parameters (Summary).

Table 5.   The performance comparison of different models.
[1]
Singh U, Garg A, Raghavan B, et al. A 780 mW 4×28 Gb/s transceiver for 100 GbE gearbox PHY in 40 nm CMOS. IEEE J Solid-State Circuits, 2014, 49(12):3116 doi: 10.1109/JSSC.2014.2352299
[2]
Hu S, Kousai S, Wang H. A broadband mixed-signal CMOS power amplifier with a hybrid class-G doherty efficiency enhancement technique. IEEE J Solid-State Circuits, 2016, 51(3):598 doi: 10.1109/JSSC.2015.2508023
[3]
Yu T, Wang H Z, Zhou B, et al. Multi-agent correlated equilibrium Q.(λ)learning for coordinated smart generation control of interconnected power grids. IEEE Trans Power Syst, 2015, 30(4):1669 doi: 10.1109/TPWRS.2014.2357079
[4]
Kan R, Tanaka T, Sugizaki G, et al. A 10th generation 16-core SPARC64.processor for mission-critical UNIX server. IEEE J Solid-State Circuits, 2014, 49(1):32 doi: 10.1109/JSSC.2013.2284650
[5]
Therdsteerasukdi K, Byun G S, Ir J, et al. Utilizing radiofrequency interconnect for a many-DIMM DRAM system. IEEE J Emerg Sel Topic Circuits Syst, 2012, 2(2):210 doi: 10.1109/JETCAS.2012.2193843
[6]
Antonsen T M, Vlasov A N, Chernin D P, et al. Transmission line model for folded waveguide circuits. IEEE Trans Electron Devices, 2013, 60(9):2906 doi: 10.1109/TED.2013.2272659
[7]
Syms R R A, Sydoruk O, Solymar L. Transmission-line model of noisy electromagnetic media. IEEE Trans Microw Theory Tech, 2013, 61(1):14 doi: 10.1109/TMTT.2012.2226742
[8]
Yang C, Yu H, Shang Y, et al. Characterization of CMOS metamaterial transmission line by compact fractional-order equivalent circuit model. IEEE Trans Electron Devices, 2015, 62(9):3012 doi: 10.1109/TED.2015.2458931
[9]
Zhu Y, Kang K, Wu Y, et al. An equivalent circuit model with current return path effects for on-chip interconnect up to 80 GHz. IEEE Trans Compon Packag Technol, 2015, 5(9):1320 doi: 10.1109/TCPMT.2015.2448572
[10]
Zheng Z, Ren K, Sun L, et al. A comparative study of three transmission line models for on-chip interconnects. IEEE Int Conf Commun Pro Sol, 2014:332 https://www.researchgate.net/publication/283025554_A_comparative_study_of_three_transmission_line_models_for_on-chip_interconnects
[11]
Sun S, Kumar R, Rustagi S C, et al. Wideband lumped element model for on-chip interconnects on lossy silicon substrate. IEEE Radio Freq Integr Circuits Symp, 2006:4 https://www.researchgate.net/publication/251851041_Wideband_Lumped_Element_Model_for_On-Chip_Asymmetrical_Coupled_Interconnects_on_Lossy_Silicon_Substrate
[12]
Kang K, Nan L, Rustagi S C, et al. A wideband scalable and SPICE-compatible model for on-chip interconnects up to 110 GHz. IEEE Trans Microw Theory Tech, 2008, 56(4):942 doi: 10.1109/TMTT.2008.919374
[13]
Gupta K C, Garg R, Chadha R. Computer aided design of microwave circuits. Dedham, MA:Artech House, 1981 https://www.researchgate.net/publication/234265070_Computer-Aided_Design_of_Microwave_Circuits
[14]
Eisenstadt W R, Eo Y. S-parameter-based IC interconnect transmission line characterization. IEEE Trans Compon, Hybrids, Manuf Technol, 1992, 15(4):483 doi: 10.1109/33.159877
[15]
Chen H H, Zhang H W, Chung S J, et al. Accurate systematic model-parameter extraction for on-chip spiral inductors. IEEE Trans Electron Devices, 2008, 55(11):3267 doi: 10.1109/TED.2008.2005131
[16]
Dhaene T, De Zutter D. Selection of lumped element models for coupled lossy transmission lines. IEEE Trans Comput Aided Design Integr Circuits Syst, 1992, 11(7):805 doi: 10.1109/43.144845

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    Received: 31 July 2016 Revised: 04 January 2017 Online: Published: 01 June 2017

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      Article Navigation >  Journal of Semiconductors  > 2017  >  38(6): 065004
      Hansheng Wang, Weiliang He, Minghui Zhang, Lu Tang. Scalable wideband equivalent circuit model for silicon-based on-chip transmission lines[J]. Journal of Semiconductors, 2017, 38(6): 065004. doi: 10.1088/1674-4926/38/6/065004 H S Wang, W L He, M H Zhang, L Tang. Scalable wideband equivalent circuit model for silicon-based on-chip transmission lines[J]. J. Semicond., 2017, 38(6): 065004. doi: 10.1088/1674-4926/38/6/065004.Export: BibTex EndNote
      Citation:
      Hansheng Wang, Weiliang He, Minghui Zhang, Lu Tang. Scalable wideband equivalent circuit model for silicon-based on-chip transmission lines[J]. Journal of Semiconductors, 2017, 38(6): 065004. doi: 10.1088/1674-4926/38/6/065004

      H S Wang, W L He, M H Zhang, L Tang. Scalable wideband equivalent circuit model for silicon-based on-chip transmission lines[J]. J. Semicond., 2017, 38(6): 065004. doi: 10.1088/1674-4926/38/6/065004.
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      Scalable wideband equivalent circuit model for silicon-based on-chip transmission lines

      doi: 10.1088/1674-4926/38/6/065004

      • School of Information Science and Engineering, Southeast University, Nanjing 211189, China

      Funds:

      National Natural Science Foundation of China 61674036

      Project supported by National Natural Science Foundation of China (No. 61674036)

      More Information
      • Corresponding author: Lu Tang Email:lutang2k@seu.edu.cn
      • Received Date: 2016-07-31
      • Revised Date: 2017-01-04
      • Published Date: 2017-06-01

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