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An Adaptive-Bandwidth CMOS PLL with Low Jitter and a Wide Tuning Range

Song Ying, Wang Yuan, Jia Song, Li Hongyi, Zhao Baoying and Ji Lijiu

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Abstract: This paper presents a novel adaptive-bandwidth charge pump PLL with low jitter and a wide tuning range.With an adaptive bandwidth,the proposed PLL can scale its loop dynamics proportional to the output frequency and maintain optimal performance over its entire output range.In order to improve the jitter performance of the PLL,a matching technique is employed in the charge pump,and a voltage-to-voltage converter is used to achieve a low gain VCO.The experimental chip was fabricated in a 0.35μm CMOS process.The measured results show that the PLL has perfect jitter performance within its operating range from 200MHz to 1.1GHz.

Key words: PLLadaptive bandwidthlow jitterwide tuning range

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    Received: 18 August 2015 Revised: 26 December 2007 Online: Published: 01 May 2008

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      Song Ying, Wang Yuan, Jia Song, Li Hongyi, Zhao Baoying, Ji Lijiu. An Adaptive-Bandwidth CMOS PLL with Low Jitter and a Wide Tuning Range[J]. Journal of Semiconductors, 2008, In Press. Song Y, Wang Y, Jia S, Li H Y, Zhao B Y, Ji L J. An Adaptive-Bandwidth CMOS PLL with Low Jitter and a Wide Tuning Range[J]. J. Semicond., 2008, 29(5): 908.Export: BibTex EndNote
      Citation:
      Song Ying, Wang Yuan, Jia Song, Li Hongyi, Zhao Baoying, Ji Lijiu. An Adaptive-Bandwidth CMOS PLL with Low Jitter and a Wide Tuning Range[J]. Journal of Semiconductors, 2008, In Press.

      Song Y, Wang Y, Jia S, Li H Y, Zhao B Y, Ji L J. An Adaptive-Bandwidth CMOS PLL with Low Jitter and a Wide Tuning Range[J]. J. Semicond., 2008, 29(5): 908.
      Export: BibTex EndNote

      An Adaptive-Bandwidth CMOS PLL with Low Jitter and a Wide Tuning Range

      • Received Date: 2015-08-18
      • Accepted Date: 2007-11-22
      • Revised Date: 2007-12-26
      • Published Date: 2008-05-05

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