SEMICONDUCTOR INTEGRATED CIRCUITS

Design of a 1.12 Gb/s 11.3 mW low-voltage differential signaling transmitter

Yuan Su1, Jixuan Xiang1, Xiaoying Shen1, Fan Ye1 and Junyan Ren1, 2,

+ Author Affiliations

 Corresponding author: Junyan Ren, E-mail: jyren@fudan.edu.cn

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Abstract: This paper presents a 1.12 Gb/s 11.3 mW transmitter using 0.18 μm mixed signal complementary metal-oxide semiconductor technology with a 1.8 V supply voltage. This transmitter implements a high-speed transmission with 1.2 V common-mode output voltage, adopting a low-voltage differential signaling (LVDS) technique. A multiplexer (MUX) and an LVDS driver are critical for a transmitter to complete a high-speed data transmission. This paper proposes a high power-efficiency single-stage 14 : 1 MUX and an adjustable LVDS driver circuit, capable of driving different loads with a slight increase in power consumption. The prototype chip implements a transmitter with a core area of 970 × 560 μm2, demonstrating low power consumption and adjustable driving capability.

Key words: transmitterLVDStree-type MUXsingle-stage MUXadjustable driverhigh power efficiency



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Fig. 1.  The architecture of a transmitter.

Fig. 2.  The timing of transmitter outputs.

Fig. 3.  (a) A tree-type MUX and (b) the architecture of 2 : 1 MUX with a divider.

Fig. 4.  The proposed single-stage MUX.

Fig. 5.  The timing of the proposed single-stage 14:1 MUX.

Fig. 6.  (a) Adjustable LVDS driver circuit and (b) its timing.

Fig. 7.  Die microphotograph of the transmitter.

Fig. 8.  The test chip architecture.

Fig. 9.  Measured timing between frame clock output (FCO) and serial data at (a) 0.7 Gb/s and (b) at 1.12 Gb/s.

Fig. 10.  (a) Measured timing between frame clock output (FCO) and data clock output (DCO) at 0.7 Gb/s and (b) at 1.12 Gb/s.

Fig. 11.  (a) Measured eye diagram of serial output data at 0.7 Gb/s and (b) at 1.12 Gb/s.

Fig. 12.  Measured serial output data with different loadings at 1.12 Gb/s.

Table 1.   Adjustable driving capability controlled by DS2/DS1.

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Table 2.   Performance summary and comparisons.

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    Received: 28 August 2014 Revised: Online: Published: 01 April 2015

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      Yuan Su, Jixuan Xiang, Xiaoying Shen, Fan Ye, Junyan Ren. Design of a 1.12 Gb/s 11.3 mW low-voltage differential signaling transmitter[J]. Journal of Semiconductors, 2015, 36(4): 045004. doi: 10.1088/1674-4926/36/4/045004 Y Su, J X Xiang, X Y Shen, F Ye, J Y Ren. Design of a 1.12 Gb/s 11.3 mW low-voltage differential signaling transmitter[J]. J. Semicond., 2015, 36(4): 045004. doi: 10.1088/1674-4926/36/4/045004.Export: BibTex EndNote
      Citation:
      Yuan Su, Jixuan Xiang, Xiaoying Shen, Fan Ye, Junyan Ren. Design of a 1.12 Gb/s 11.3 mW low-voltage differential signaling transmitter[J]. Journal of Semiconductors, 2015, 36(4): 045004. doi: 10.1088/1674-4926/36/4/045004

      Y Su, J X Xiang, X Y Shen, F Ye, J Y Ren. Design of a 1.12 Gb/s 11.3 mW low-voltage differential signaling transmitter[J]. J. Semicond., 2015, 36(4): 045004. doi: 10.1088/1674-4926/36/4/045004.
      Export: BibTex EndNote

      Design of a 1.12 Gb/s 11.3 mW low-voltage differential signaling transmitter

      doi: 10.1088/1674-4926/36/4/045004
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      Project supported by the National Science and Technology Support Program of China (No. 2012BAI13B07) and the National High-Tech Research and Development Program of China (No. 2013AA014101).

      More Information
      • Corresponding author: E-mail: jyren@fudan.edu.cn
      • Received Date: 2014-08-28
      • Accepted Date: 2014-09-23
      • Published Date: 2015-01-25

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