SEMICONDUCTOR INTEGRATED CIRCUITS

Design of improved CMOS phase-frequency detector and charge-pump for phase-locked loop

Faen Liu, Zhigong Wang, Zhiqun Li, Qin Li and Sheng Chen

+ Author Affiliations

 Corresponding author: Liu Faen,Email:liufaenseu@gmail.com; Wang Zhigong,Email:zgwang@seu.edu.cn

PDF

Abstract: Two essential blocks for the PLLs based on CP, a phase-frequency detector (PFD) and an improved current steering charge-pump (CP), are developed. The mechanisms for widening the phase error detection range and eliminating the dead zone are analyzed and applied in our design to optimize the proposed PFD. To obtain excellent current matching and minimum current variation over a wide output voltage range, an improved structure for the proposed CP is developed by fully utilizing many additional sub-circuits. Implemented in a standard 90-nm CMOS process, the proposed PFD achieves a phase error detection range from -354 ° to 354 ° and the improved CP demonstrates a current mismatch of less than 1.1% and a pump-current variation of 4% across the output voltage, swinging from 0.2 to 1.1 V, and the power consumption is 1.3 mW under a 1.2-V supply.

Key words: CMOSphase-frequency detectorcharge-pumpcurrent compensationaccelerating acquisitionPLL



[1]
Lee J Y, Lee S H, Haecheon K, et al. 28.5-32-GHz fast settling multichannel PLL synthesizer for 60-GHz WPAN radio. IEEE Microwave Theory Tech, 2008, 56(5):1234 doi: 10.1109/TMTT.2008.920179
[2]
Kailuke A C, Agrawal P, Kshirsagar R V. Design of phase frequency detector and charge pump for low voltage high frequency PLL. Electronic Systems, Signal Processing and Computing Technologies, 2014:74 http://ieeexplore.ieee.org/abstract/document/6745349/
[3]
Anush K N K, Mangalam H, Dharani V A, et al. Comparison and analysis of various PFD architecture for a phase locked loop design. Computational Intelligence and Computing Research (ICCIC), 2013:1 http://ieeexplore.ieee.org/document/6724238/
[4]
Chen W H, Inerowicz M E, Jung B. Phase frequency detector with minimal blind zone for fast frequency acquisition. IEEE Trans Circuits Syst Ⅱ:Express Briefs, 2010, 57(12):936 doi: 10.1109/TCSII.2010.2087951
[5]
Han S Y, Jin J, Mao C. A full-swing charge pump with zero phase offset. Microelectron Electron, 2009:298 http://ieeexplore.ieee.org/document/5397388/authors
[6]
Liu P, Sun P, Jung J, et al. PLL charge pump with adaptive body-bias compensation for minimum current variation. Electron Lett, 2012, 48(1):16 doi: 10.1049/el.2011.2835
[7]
Feng S, Tong H T, Silva-Martinez J, et al. Design and analysis of an ultra-speed glitch-free fully differential charge pump with minimum output current variation and accurate matching. IEEE Trans Circuits Syst Ⅱ:Express Briefs, 2006, 53(9):843 doi: 10.1109/TCSII.2006.879100
[8]
Hwang M S, Kim J, Jeong D K. Reduction of pump current mismatch in charge-pump PLL. Electron Lett, 2009, 45(3):135 doi: 10.1049/el:20092727
[9]
Zheng S S, Li Z Q. A novel CMOS charge pump with high performance for phase-locked loops synthesizer. IEEE Commun Technol, 2011:1062 http://ieeexplore.ieee.org/document/6158043/?reload=true&arnumber=6158043&punumber%3D6153171]
Fig. 1.  (a) Gate level implementation of the proposed PFD. (b) Diagram of blind zone production.

Fig. 2.  Schematic of the proposed current steering charge pump.

Fig. 3.  Pump current matching curves. (a) Conventional charge pump. (b) Charge pump with an error amplifier.

Fig. 4.  Simulated phase margin curves corresponding to the different output voltages.

Fig. 5.  (a) Schematic of the dynamic current compensation circuit. (b) Current matching curves for the CP with current compensation circuit.

Fig. 6.  Schematic of clock feed through circuit.

Fig. 7.  Schematic of accelerating acquisition circuit.

Fig. 8.  Current mismatching curves for the CP under different cornercases (FS and SF) and temperatures.]

Fig. 13.  Simulated and measured current match curves of the proposed CP.

Fig. 9.  Connection diagram of the proposed PFD and CP.

Fig. 12.  Simulated and measured phase error detection curves with zero dead zone.

Fig. 10.  Connection diagram of the proposed PFD and CP.

Fig. 11.  Measured reset pulse of the proposed PFD for 50-MHz input signals with the same frequency and phase.

Fig. 14.  Measured charging and discharging process of the proposed PFD and CP. (a) Charging process. (b) Discharging process.

Table 1.   Comparison of the performances for the currently published CPs.

[1]
Lee J Y, Lee S H, Haecheon K, et al. 28.5-32-GHz fast settling multichannel PLL synthesizer for 60-GHz WPAN radio. IEEE Microwave Theory Tech, 2008, 56(5):1234 doi: 10.1109/TMTT.2008.920179
[2]
Kailuke A C, Agrawal P, Kshirsagar R V. Design of phase frequency detector and charge pump for low voltage high frequency PLL. Electronic Systems, Signal Processing and Computing Technologies, 2014:74 http://ieeexplore.ieee.org/abstract/document/6745349/
[3]
Anush K N K, Mangalam H, Dharani V A, et al. Comparison and analysis of various PFD architecture for a phase locked loop design. Computational Intelligence and Computing Research (ICCIC), 2013:1 http://ieeexplore.ieee.org/document/6724238/
[4]
Chen W H, Inerowicz M E, Jung B. Phase frequency detector with minimal blind zone for fast frequency acquisition. IEEE Trans Circuits Syst Ⅱ:Express Briefs, 2010, 57(12):936 doi: 10.1109/TCSII.2010.2087951
[5]
Han S Y, Jin J, Mao C. A full-swing charge pump with zero phase offset. Microelectron Electron, 2009:298 http://ieeexplore.ieee.org/document/5397388/authors
[6]
Liu P, Sun P, Jung J, et al. PLL charge pump with adaptive body-bias compensation for minimum current variation. Electron Lett, 2012, 48(1):16 doi: 10.1049/el.2011.2835
[7]
Feng S, Tong H T, Silva-Martinez J, et al. Design and analysis of an ultra-speed glitch-free fully differential charge pump with minimum output current variation and accurate matching. IEEE Trans Circuits Syst Ⅱ:Express Briefs, 2006, 53(9):843 doi: 10.1109/TCSII.2006.879100
[8]
Hwang M S, Kim J, Jeong D K. Reduction of pump current mismatch in charge-pump PLL. Electron Lett, 2009, 45(3):135 doi: 10.1049/el:20092727
[9]
Zheng S S, Li Z Q. A novel CMOS charge pump with high performance for phase-locked loops synthesizer. IEEE Commun Technol, 2011:1062 http://ieeexplore.ieee.org/document/6158043/?reload=true&arnumber=6158043&punumber%3D6153171]
  • Search

    Advanced Search >>

    GET CITATION

    shu

    Export: BibTex EndNote

    Article Metrics

    Article views: 3246 Times PDF downloads: 117 Times Cited by: 0 Times

    History

    Received: 20 March 2014 Revised: 08 May 2014 Online: Published: 01 October 2014

    Catalog

      Email This Article

      User name:
      Email:*请输入正确邮箱
      Code:*验证码错误
      Faen Liu, Zhigong Wang, Zhiqun Li, Qin Li, Sheng Chen. Design of improved CMOS phase-frequency detector and charge-pump for phase-locked loop[J]. Journal of Semiconductors, 2014, 35(10): 105006. doi: 10.1088/1674-4926/35/10/105006 F E Liu, Z G Wang, Z Q Li, Q Li, S Chen. Design of improved CMOS phase-frequency detector and charge-pump for phase-locked loop[J]. J. Semicond., 2014, 35(10): 105006. doi: 10.1088/1674-4926/35/10/105006.Export: BibTex EndNote
      Citation:
      Faen Liu, Zhigong Wang, Zhiqun Li, Qin Li, Sheng Chen. Design of improved CMOS phase-frequency detector and charge-pump for phase-locked loop[J]. Journal of Semiconductors, 2014, 35(10): 105006. doi: 10.1088/1674-4926/35/10/105006

      F E Liu, Z G Wang, Z Q Li, Q Li, S Chen. Design of improved CMOS phase-frequency detector and charge-pump for phase-locked loop[J]. J. Semicond., 2014, 35(10): 105006. doi: 10.1088/1674-4926/35/10/105006.
      Export: BibTex EndNote

      Design of improved CMOS phase-frequency detector and charge-pump for phase-locked loop

      doi: 10.1088/1674-4926/35/10/105006
      Funds:

      the National Basic Research Program of China 2010CB327404

      Project supported by the National Basic Research Program of China (No. 2010CB327404), the National High Technology Research and Development Program (No. 2011AA10305), and the National Natural Science Foundation of China (No. 60901012)

      the National Natural Science Foundation of China 60901012

      the National High Technology Research and Development Program 2011AA10305

      More Information

      Catalog

        /

        DownLoad:  Full-Size Img  PowerPoint
        Return
        Return