Fig. 1.
(a) The operating principle of a typical LDO. (b) The operating principle of the proposed DF-LDO.
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| Citation: |
Zhikui Duan, Jianguo Hu, Yi Ding, Chong Lu, Yanyu Ding, Deming Wang, Hongzhou Tan. A novel dual-feed low-dropout regulator[J]. Journal of Semiconductors, 2015, 36(6): 065003. doi: 10.1088/1674-4926/36/6/065003
Z K Duan, J G Hu, Y Ding, C Lu, Y Y Ding, D M Wang, H Z Tan. A novel dual-feed low-dropout regulator[J]. J. Semicond., 2015, 36(6): 065003. doi: 10.1088/1674-4926/36/6/065003.
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Abstract
A novel dual-feed (DF) low-dropout (LDO) is presented. The DF-LDO adopts dual control loops to maintain the output voltage. The dual control loops include a feedback loop and a feedforward loop. There is an equilibrium point in dual control loops, and the equilibrium point is the output voltage of the DF-LDO. In addition, the transient performance is optimized by adjusting the damping ratio and natural frequency. With a 1 μF decoupling capacitor, the proposed DF-LDO is fabricated in a 0.18 μm CMOS process and its output voltage is 1.5 V. When the workload changes from 100 μA to 100 mA in 100 ns, load regulation of 7 mV for a 100 mA step is achieved, the settling time is 997 ns and the undershoot is 12.8 mV; when the workload changes from 100 mA to 100 μA in 100 ns, the settling time is 249 ns with an imperceptible overshoot.-
Keywords:
- dual-feed,
- fast transient response,
- DF-LDO,
- damping ratio,
- natural frequency
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References
[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] -
Proportional views
