SEMICONDUCTOR INTEGRATED CIRCUITS

High voltage generator circuit with low power and high efficiency applied in EEPROM

Liu Yan, Zhang Shilin and Zhao Yiqiang

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Abstract: This paper presents a low power and high efficiency high voltage generator circuit embedded in electrically erasable programmable read-only memory (EEPROM). The low power is minimized by a capacitance divider circuit and a regulator circuit using the controlling clock switch technique. The high efficiency is dependent on the zero threshold voltage (Vth) MOSFET and the charge transfer switch (CTS) charge pump. The proposed high voltage generator circuit has been implemented in a 0.35 μm EEPROM CMOS process. Measured results show that the proposed high voltage generator circuit has a low power consumption of about 150.48 μW and a higher pumping efficiency (83.3%) than previously reported circuits. This high voltage generator circuit can also be widely used in low-power flash devices due to its high efficiency and low power dissipation.

Key words: CTS charge pump

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    Received: 20 August 2015 Revised: 09 January 2012 Online: Published: 01 June 2012

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      Liu Yan, Zhang Shilin, Zhao Yiqiang. High voltage generator circuit with low power and high efficiency applied in EEPROM[J]. Journal of Semiconductors, 2012, 33(6): 065006. doi: 10.1088/1674-4926/33/6/065006 Liu Y, Zhang S L, Zhao Y Q. High voltage generator circuit with low power and high efficiency applied in EEPROM[J]. J. Semicond., 2012, 33(6): 065006. doi: 10.1088/1674-4926/33/6/065006.Export: BibTex EndNote
      Citation:
      Liu Yan, Zhang Shilin, Zhao Yiqiang. High voltage generator circuit with low power and high efficiency applied in EEPROM[J]. Journal of Semiconductors, 2012, 33(6): 065006. doi: 10.1088/1674-4926/33/6/065006

      Liu Y, Zhang S L, Zhao Y Q. High voltage generator circuit with low power and high efficiency applied in EEPROM[J]. J. Semicond., 2012, 33(6): 065006. doi: 10.1088/1674-4926/33/6/065006.
      Export: BibTex EndNote

      High voltage generator circuit with low power and high efficiency applied in EEPROM

      doi: 10.1088/1674-4926/33/6/065006
      • Received Date: 2015-08-20
      • Accepted Date: 2011-11-14
      • Revised Date: 2012-01-09
      • Published Date: 2012-05-22

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